HD74HC595_15 Datasheet, PDF (11/13 Pages) Renesas Technology Corp – 8-bit Shift Register/Latch (with 3-state outputs)

HD74HC595
• Waveform – 5 (SCK to RCK)
t_r
t_f
90 %
90 %
V_CC
Input SCK
50 %
10 %
10 %
0V
t_su
t_w
90 %
V_CC
Input RCK
50 %
50 %
10 %
10 %
0V
t_r
t_f
Note : 1. Input waveform : PRR ≤ 1 MHz, duty cycle 50%, t_r ≤ 6 ns, t_f ≤ 6 ns
• Waveform – 6 (t_ZL, t_ZH, t_LZ, t_HZ)
t_f
t_r
Input G
90 %
50 %
90 %
V_CC
50 %
10 %
10 %
0V
t_ZL
t_LZ
V_OH
Waveform - A
50 %
10 %
t_ZH
t_HZ
V_OL
90 %
V_OH
Waveform - B
50 %
V_OL
Notes : 1. Input waveform : PRR ≤ 1 MHz, duty cycle 50%, t_r ≤ 6 ns, t_f ≤ 6 ns
2. Waveform - A is for an output with internal conditions such that the
output is low except when disabled by the output control.
3. Waveform - B is for an output with internal conditions such that the
output is high except when disabled by the output control.
4. The output are measured one at a time with one transition per measurement.
Rev.2.00 Mar 30, 2006 page 9 of 10