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3802_M Datasheet, PDF (103/208 Pages) Renesas Technology Corp – 8-BIT SINGLE-CHIP MICROCOMPUTER 740 FAMILY / 38000 SERIES
APPLICATION
2.3 Serial I/O
Control procedure :
ΠControl in the master unit
After a setting of the related registers is completed as shown in Figure 2.3.33, in the master unit
transmission or reception of 1-byte data is started simply by writing transmission data to the
Transmit buffer register.
To perform the communication in the timing shown in Figure 2.3.32, therefore, take the timing into
account and write transmission data. Read out the reception data when the Serial I/O1 transmit
interrupt request bit is set to “1,” or before the next transmission data is written to the Transmit
buffer register.
A processing example in the master unit using timer interrupts is shown below.
Interrupt processing routine
executed every 488 µ s
CLT (Note 1)
CLD (Note 2)
Push register to stack
Within a block transfer period?
Y
Read a reception data
Note 1: When using the Index X mode flag (T).
Note 2: When using the Decimal mode flag (D).
q Push the register used in the interrupt
processing routine into the stack.
N
q Generate a certain block interval by
using a timer or other functions.
Count a block interval counter
q Check the block interval counter and
determine to start of a block transfer.
Complete to transfer a block?
Y
N
Write a transmission data
Start a block transfer?
N
Y
Write the first transmission data
(first byte) in a block
Pop registers
q Pop registers which is pushed to stack.
RTI
Fig. 2.3.34 Control in the master unit
3802 GROUP USER’S MANUAL
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