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R32C120_10 Datasheet, PDF (101/103 Pages) Renesas Technology Corp – RENESAS MCU | |||
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REVISION HISTORY
R32C/120 Group Datasheet
Rev.
Date
Page
27
29
34
38-40
42
43
59
â
61
62
63
67
68
69
70
73, 84
74, 85
75
Description
Summary
⢠Changed reset values âXXXX XXXXbâ and âXXXX 000Xbâ for
registers U3RB and U4RB in Table 4.9 to âXXXXhâ
⢠Changed expression of register name âXi Register Yi Registerâ and
register symbol âXiR, YiRâ in Table 4.11 to âXi Register/Yi Registerâ
and âXiR/YiRâ, respectively
⢠Changed hexadecimal format of reset values for registers PD0 to
PD7, PD9, and PD10 in Table 4.16 to binary
⢠Changed register name âPort Pi_j Port Function Select Registerâ in
Tables 4.20 to 4.22 to âPort Pi_j Function Select Registerâ
⢠Changed register name âDMAi Request Source Select Register 1â
in Table 4.24 to âDMAi Request Source Select Registerâ
⢠Changed register names âWake-up/Interrupt Priority Level Control
Register 2â and âWake-up/Interrupt Priority Level Control Register 1â
in Table 4.24 to âWake-up IPL Setting Register 2â and âWake-up IPL
Setting Register 1â, respectively
⢠Modified âXâ in reset values for unassigned bits to â0â for the
following registers in Table 4.25: LCW, LBRG, LMD0, LBRK, LSPC,
LRFC, LSC, LTC, LST, and LEST
⢠Modified reset value â00hâ for C0CLKR in Table 4.41 to â000X
0000bâ
Chapter 5. Electrical Characteristics
⢠Made minor text modifications to this chapter
⢠Added description of dVcc/dt to Table 5.2
⢠Added Note 2 to Table 5.3
⢠Corrected a typo âpotsâ in line 2 of Note 2 for Table 5.4 to âportsâ
⢠Deleted specification of âtPSâ from Table 5.8
⢠Corrected a typo â32 Kbyte blockâ in Table 5.9 to â32 byte blockâ
⢠Deleted the measurement condition from Table 5.10
⢠Changed voltage condition for Table 5.12 from âVcc = 3.0 to 5.5 Vâ
to âVcc = 4.2 to 5.5 Vâ
⢠Changed the following expressions in Table 5.13: âPLL frequency
synthesizer stabilization timeâ to âPLL lock timeâ and âtOSC(PLL)â to
âtLOCK(PLL)â; Added the measurement condition and Note 3 for
tLOCK(PLL)
⢠Newly added two characteristics: âLock detectionâ and âUnlock
detectionâ and Note 1
⢠Changed maximum value for fSO(PLL) in Table 5.13 from â65â to â80â
⢠Changed the order of description of trec(STOP) and trec(WAIT) in
Table 5.14 and Figure 5.4
⢠Deleted âP8_5â from âCharacteristicâ of âPull-up resistorâ in Tables
5.17 and 5.37
⢠Changed expression âRunningâ for âMeasurement conditionâ in
Tables 5.18 and 5.38 to âActiveâ; Added âXINâ as âActiveâ to first,
third, and sixth rows of respective tables
⢠Modified expression âSample timeâ for âCharacteristicsâ in Table
5.19 to âSampling timeâ
A- 2
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