R1QBA4436RBG Datasheet, PDF (1/37 Pages) Renesas Technology Corp – 144-Mbit DDRII+ SRAM 2-word Burst

R1QBA44**RBG / R1QEA44**RBG Series (Preliminary)
R1QBA4436RBG / R1QBA4418RBG / R1QBA4409RBG
R1QEA4436RBG / R1QEA4418RBG / R1QEA4409RBG
R1QHA4436RBG / R1QHA4418RBG / R1QHA4409RBG
R1QLA4436RBG / R1QLA4418RBG / R1QLA4409RBG
R10DS0189EJ0011
144-Mbit DDRII+ SRAM
2-word Burst
Preliminary
Rev. 0.11b
2012.06.05
Description
The R1Q#A4436 is a 4,194,304-word by 36-bit and the R1Q#A4418 is a 8,388,608-word by 18-bit synchronous
double data rate static RAM fabricated with advanced CMOS technology using full CMOS six-transistor
memory cell. It integrates unique synchronous peripheral circuitry and a burst counter. All input registers are
controlled by an input clock pair (K and /K) and are latched on the positive edge of K and /K. These products
are suitable for applications which require synchronous operation, high speed, low voltage, high density and
wide bit configuration. These products are packaged in 165-pin plastic FBGA package.
# = B: Latency =2.5, w/o ODT
# = E: Latency =2.5, w/ ODT
# = H: Latency =2.0, w/o ODT
# = L: Latency =2.0, w/ ODT
Features
႑ Power Supply
• 1.8 V for core (V_DD), 1.4 V to V_DD for I/O (V_DDQ)
႑ Clock
• Fast clock cycle time for high bandwidth
• Two input clocks (K and /K) for precise DDR timing at clock rising edges only
• Two output echo clocks (CQ and /CQ) simplify data capture in high-speed systems
• Clock-stop capability with Ps restart
႑ I/O
• Common data input/output bus
• Pipelined double data rate operation
• HSTL I/O
• User programmable output impedance
• DLL/PLL circuitry for wide output data valid window and future frequency scaling
• Data valid pin (QVLD) to indicate valid data on the output
႑ Function
• Two-tick burst for low DDR transaction size
• Internally self-timed write control
• Simple control logic for easy depth expansion
• JTAG 1149.1 compatible test access port
႑ Package
• 165 FBGA package (15 x 17 x 1.4 mm)
Notes: 1. QDR RAMs and Quad Data Rate RAMs comprise a new family of products developed by Cypress
Semiconductor, IDT, Samsung, and Renesas Electronics Corp. (QDR Co-Development Team)
2. The specifications of this device are subject to change without notice. Please contact your nearest
Renesas Electronics Sales Office regarding specifications.
3. Refer to
"http://www.renesas.com/products/memory/fast_sram/qdr_sram/index.jsp"
for the latest and detailed information.
4. Descriptions about x9 parts in this datasheet are just for reference.
Rev. 0.11b : 2012.06.05
R10DS0189EJ0011
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