M66255FP Datasheet, PDF (1/14 Pages) Mitsubishi Electric Semiconductor – 8192 x 10-BIT LINE MEMORY (FIFO)

M66255FP
8192 × 10-Bit Line Memory (FIFO)
REJ03F0249-0200
Rev.2.00
Sep 14, 2007
Description
The M66255FP is a high-speed line memory with a FIFO (First In First Out) structure of 8192-word × 10-bit
configuration which uses high-performance silicon gate CMOS process technology.
It has separate clock, enable and reset signals for write and read, and is most suitable as a buffer memory between
devices with different data processing throughput.
Features
• Memory configuration:
8192 words × 10 bits (dynamic memory)
• High-speed cycle:
30 ns (Min)
• High-speed access:
25 ns (Max)
• Output hold:
5 ns (Min)
• Fully independent, asynchronous write and read operations
• Variable length delay bit
• Output:
3 states
Application
Digital photocopiers, high-speed facsimile, laser beam printers.
Block Diagram
Data input
D₀ to D₉
15 16 17 18 19 24 25 26 27 28
Data output
Q₀ to Q₉
1 2 3 4 5 10 11 12 13 14
Input buffer
Output buffer
WE ²³
Write
enable input
WRES ²²
Write
reset input
WCK 20
Write
clock input
V_CC ²¹
Memory array of
8192-word × 10-bit
configuration
6 RE
Read
enable input
7 RRES
Read
reset input
9 RCK
Read
clock input
8 GND
REJ03F0249-0200 Rev.2.00 Sep 14, 2007
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