M5M29KE131BTP Datasheet, PDF (1/33 Pages) Renesas Technology Corp – 134,217,728-BIT (16,777,216-WORD BY 8-BIT / 8,388,608-WORD BY 16-BIT) CMOS FLASH MEMORY

Renesas LSIs
M5M29KE131BTP
134,217,728-BIT (16,777,216-WORD BY 8-BIT / 8,388,608-WORD BY 16-BIT)
CMOS FLASH MEMORY
Stacked-uMCP (micro Multi Chip Package)
DESCRIPTION
The M5M29KE131BTP is a Stacked micro Multi Chip
The M5M29KE131BTP is suitable for a high performance cellular
Package that contents 2 Dies of 64M-bit Flash memory in a phone and a mobile PC that are required to be small mounting
52-pin TSOP(II) for lead free use.
area, weight and small power dissipation.
128M-bit Flash memory is a 16,777,216 bytes / 8,388,608
words, single power supply and high performance non-
volatile memory fabricated by CMOS technology for the
peripheral circuit and DINOR IV (Divided bit-line NOR IV)
architecture for the memory cell. All memory blocks are
locked and can not be programmed or erased, when WP# is
Low. Using Software Lock Release function, program or
erase operation can be executed.
FEATURES
Access time
Random
Page
Supply voltage
70ns (Max.)
25ns(Max.)
VCC= 3.0 ~ 3.6V
Ambient temperature
Ta=-40 ~ 85 °C
Package
52pin TSOP(Type-II), Lead pitch 0.4mm
Outer-lead finishing : Sn-Cu
APPLICATION
Digital Cellar Phone, Telecommunication,
PDA, Car Navigation System, Video Game Machine
PIN CONFIGURATION (TOP VIEW)
VCC
GND
A0-A22
DQ0-DQ15
CE#
OE#
A15
1
A14
2
A13
3
A12
4
A11
5
A10
6
A9
7
A8
8
A19
9
NC
10
WE # 11
RP #
12
GND(WP#) 13
NC
14
A22 ¹⁵
A21 ¹⁶
A20 17
A18 18
A17 ¹⁹
A7
20
A6
21
A5
22
A4 23
A3 24
A2 25
A1 26
: VCC
: GND
: Address
: Data I/O
: Chip enable
: Output enable
M5M29KE131BTP
10.49 mm
52 A16
51 BYTE#
50 NC
49 GND
48 _NC
47 DQ15/A-1
46 DQ7
45 DQ14
44 DQ6
43 DQ13
42 DQ5
41 DQ12
40 DQ4
39 VCC
38 DQ11
37 DQ3
36 DQ10
35 DQ2
34 DQ9
33 DQ1
32 DQ8
31 DQ0
30 OE#
29 GND
28
27
CE #
A0
Outline
52PTG-A
WE#
GND(WP#)
RP#
BYTE#
: Write enable
: Write protect (recommend to fix to GND)
(Background information No. : REJ06C0052)
: Reset power down
: Byte enable
1
Rev.1.1_48a_bezz