HD74LV393A Datasheet, PDF (1/11 Pages) Hitachi Semiconductor – Dual 4-bit Binary Counters

HD74LV393A
Dual 4-bit Binary Counters
REJ03D0333–0300Z
(Previous ADE-205-276A (Z))
Rev.3.00
Jun. 28, 2004
Description
The HD74LV393A contain two 4-bit ripple carry binary counters, which can be cascaded to create a single divide-by-
256 counter.
The HD74LV393A is incremented on the high to low transition (negative edge) of the clock input, and each has an
independent clear input. When clear is set high all four bits of each counter is set to a low level. This enables count
truncation and allows the implementation of divide-by-N counter configurations.
Low-voltage and high-speed operation is suitable for the battery-powered products (e.g., notebook computers), and the
low-power consumption extends the battery life.
Features
• V_CC = 2.0 V to 5.5 V operation
• All inputs V_IH (Max.) = 5.5 V (@V_CC = 0 V to 5.5 V)
• All outputs V_O (Max.) = 5.5 V (@V_CC = 0 V)
• Typical V_OL ground bounce < 0.8 V (@V_CC = 3.3 V, Ta = 25°C)
• Typical V_OH undershoot > 2.3 V (@V_CC = 3.3 V, Ta = 25°C)
• Output current ±6 mA (@V_CC = 3.0 V to 3.6 V), ±12 mA (@V_CC = 4.5 V to 5.5 V)
• Ordering Information
Part Name
Package Type
Package Code
Package
Abbreviation
HD74LV393AFPEL
SOP–14 pin(JEITA) FP–14DAV
FP
HD74LV393ARPEL
SOP–14 pin(JEDEC) FP–14DNV
RP
HD74LV393ATELL
TSSOP–14 pin
TTP–14DV
T
Note: Please consult the sales office for the above package availability.
Taping Abbreviation
(Quantity)
EL (2,000 pcs/reel)
EL (2,500 pcs/reel)
ELL (2,000 pcs/reel)
Rev.3.00 Jun. 28, 2004 page 1 of 10