HD74HC194 Datasheet, PDF (1/9 Pages) Hitachi Semiconductor – 4-bit Bidirectional Universal Shift Register

HD74HC194
4-bit Bidirectional Universal Shift Register
REJ03D0589–0200
(Previous ADE-205-466)
Rev.2.00
Jan 31, 2006
Description
This bidirectional shift register is designed to incorporate virtually all of the features a system designer may want in a
shift register. It features parallel inputs, parallel outputs, right shift and left shift serial inputs, operating mode control
inputs, and a direct overriding clear line. The register has four distinct modes of operation: parallel (broadside) load,
shift right (in the direction Q_A toware Q_D); shift left; inhibit clock (do nothing).
Synchronous parallel loading is accomplished by applying the four bits of data and taking both mode control inputs, S₀
and S₁, high. The data are loaded into their respective flip-flops and appear at the outputs after the positive transition of
the clock input. During loading, serial data flow is inhibited. Shift right is accomplished synchronously with the rising
edge of the clock pulse when S₀ is high and S₁ is low. Serial data for this mode is entered at the shift right data input.
When S₀ is low and S₁ is high, data shifts left synchronously and new data is entered at the shift left serial input.
Clocking of the flip-flops is inhibited when both mode control inputs are low. The mode control inputs should be
changed only when the clock input is high.
Features
• High Speed Operation: t_pd (Clock to Q) = 12 ns typ (C_L = 50 pF)
• High Output Current: Fanout of 10 LSTTL Loads
• Wide Operating Voltage: V_CC = 2 to 6 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: I_CC (static) = 4 µA max
• Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
Package
Abbreviation
HD74HC194P
DILP-16 pin
PRDP0016AE-B _P
(DP-16FV)
Taping Abbreviation
(Quantity)
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Rev.2.00 Jan 31, 2006 page 1 of 8