R1620 Datasheet, PDF (3/5 Pages) RDC Semiconductor – FAST ETHERNET RISC PROCESSOR

RDC®
RISC DSP Communication
2. Block Diagram
R1620
FAST ETHERNET RISC PROCESSOR
CLKOUTA
INT2/INTA0_n
INT1/SELECT_n
INT3/INTA1_n/IRQ
INT[6:5]
INT0 NMI
X1 ^X2
Clock and
VCC
Power
GND
Management
Interrupt
Control Unit
TMROUT0 TMROUT1
TMRIN0 TMRIN1
Timer Control
Unit
RST_n
LCS_n/ONCE0_n
UCS_n/ONCE1_n
PCS5_n
PCS6_n
Chip
Select
Unit
ARDY
SRDY
DT/R_n
DEN_n
HOLD
HLDA
SD_CLK
CKE
CS_n
WE_n
CAS_n
RAS_n
BA
Refresh
Control
Unit
SDRAM/Bus
Interface
Unit
Instruction
Queue (64bits)
Instruction
Decoder
Control Signal
Register
File
General,
Segment,
Eflag Register
Micro
ROM
EA / LA
Address
ALU
(Special,
Logic,
Adder,
BSF)
Execution
Unit
DRQ0 DRQ1
DMA
Unit
MAC1
MII 1
MAC0
MII 0
PIO
Unit
16550 UART
Serial
Port0
16550 UART
Serial
Port1
DCD0_n
SIN0
DSR0_n
CTS0_n
RI0_n
RTS0_n
SOUT0
DTR0_n
DCD1_n
SIN1
DSR1_n
CTS1_n
RI1_n
RTS1_n
SOUT1
DTR1_n
A[19:0]
AD[15:0]
RD_n
WHB_n
ALE
WLB_n/ADEN_n
WR_n/BWSEL
Specifications subject to change without notice, contact your sales representatives for the most update information.
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REV 1.0 Sep. 20 2006