R1610 Datasheet, PDF (3/4 Pages) RDC Semiconductor – FAST ETHERNET RISC PROCESSOR

RDC®
RISC DSP Communication
2. Block Diagram
R1610
FAST ETHERNET RISC PROCESSOR
CLKOUTA
INT2/INTA0_n
INT1/SELECT_n
INT[6:5]
INT0 NMI
TMROUT0
TMROUT1
TMRIN0 TMRIN1
DRQ0
DRQ1
X1 X2
Clock and
VCC
Power
GND
Managemen
t
Interrupt
Control Unit
Timer Control
Unit
DMA
Unit
RST_n
MAC
MII
UCS_n
PCS5_n
PCS[3:0]_n
Chip
Select
Unit
ARDY
SD_CLK
WE_n
CAS_n
RAS_n
Refresh
Control
Unit
SDRAM/Bus
Interface
Unit
Instruction
Queue (64bits)
Instruction
Decoder
Control Signal
Register
File
General,
Segment,
Eflag Register
Micro
ROM
EA / LA
Address
ALU
(Special,
Logic,
Adder,
BSF)
Execution
Unit
PIO
Unit
16550 UART
Serial
Port0
16550 UART
Serial
Port1
DCD0_n
SIN0
DSR0_n
CTS0_n
RI0_n
RTS0_n
SOUT0
DTR0_n
DCD1_n
SIN1
DSR1_n
CTS1_n
RTS1_n
SOUT1
DTR1_n
A[19:0]
AD[15:0]
RD_n
ALE _{WR_n/BWSEL}
Specifications subject to change without notice, contact your sales representatives for the most update information.
Page 3 of 4
REV 1.0 Nov. 25 2005