VRS51L2070 Datasheet, PDF (78/99 Pages) Ramtron International Corporation – High-Performance Versa 8051 MCU

VRS51L2070
13.4 Watchdog Timer Example Programs
Initialization and Reset of the Watchdog Timer
//---------------------------------------------------------------------------------------------------------------------//
// VRS51L2070-WDT_Demo_SDCC.c //
//---------------------------------------------------------------------------------------------------------------------//
// DESCRIPTION: VRS51L2070 Watchdog Timer Demonstration Program
//
*This Program Set P1 as output
//
*P1 is set to 0xFF for 100ms
//
*Initialize the watchdog timer with a timeout period of 20ms
//
*Clear P1
//
*Start a delay function
//
*If the Delay parameter of the delay function is larger than the
//
Timeout period of the watchdog timer, the WDT will reset the VRS51L2070
//
which will bring back P1 to high level
//---------------------------------------------------------------------------------------------------------------------//
#include <VRS51L2070_SDCC.h>
// --- function prototypes
void delay(unsigned int);
//-----------------------------------------------------//
//
MAIN FUNCTION
//
//-----------------------------------------------------//
void main (void) {
PERIPHEN1 = 0x01;
PERIPHEN2 = 0x08;
//Enable Timer 0
//Enable IOPORT
P1PINCFG = 0x00;
//Config port 1 as output
//-- Enable the Watchdog Timer
PERIPHEN2 |= 0x04;
P1 = 0xFF;
//Set P1 to output 0xFF
delay(100);
//Keep P1 high for 100ms
//-- Configure the watchdog timer
WDTCFG = 0x62;
WDTCFG = 0x63;
//Configure and Reset the Watchdog Timer
//Bit 7:4 = WDTPERIOD : Define the timeout period (20ms)
//Bit 3 = WTIMEROVF : WDT as timer overflow flag
//Bit 2 = ASTIMER : WDT mode (0=WDT, 1=Timer)
//Bit 1 = WDTOVF : WDT overflow (Timeout) Flag
//Bit 0 = WDTRESET : WDT reset. To reset WDT
//this bit must be cleared, then set
P1 = 0x00;
do{
delay(10);
WDTCFG = 0x62;
WDTCFG = 0x63;
}while(1);
}// End of main
//Clear P1
//If delay > 20ms then the WDT will reset the VRS51L2070
//and P1 will return to high
//Reset the watchdog timer
//Loop Forever
//;------------------------------------------------------------------//
//;- DELAY1MSTO : 1MS DELAY USING TIMER0
//;
//; CALIBRATED FOR 40MHZ
//;-----------------------------------------------------------------//
void delay(unsigned int dlais){
idata unsigned char x=0;
idata unsigned int dlaisloop;
x = PERIPHEN1;
x |= 0x01;
PERIPHEN1 = x;
//LOAD PERIPHEN1 REG
//ENABLE TIMER 0
dlaisloop = dlais;
while ( dlaisloop > 0)
{
TH0 = 0x63;
TL0 = 0xC0;
//TIMER0 RELOAD VALUE FOR 1MS AT 40MHZ
T0T1CLKCFG = 0x00;
T0CON = 0x04;
do{
x=T0CON;
x= x & 0x80;
}while(x==0);
T0CON = 0x00;
dlaisloop = dlaisloop-1;
}//end of while dlais...
x = PERIPHEN1;
x = x & 0xFE;
PERIPHEN1 = x;
}//End of function delais
//NO PRESCALER FOR TIMER 0 CLOCK
//START TIMER 0, COUNT UP
//Stop Timer 0
//LOAD PERIPHEN1 REG
//DISABLEBLE TIMER 0
14 VRS51L2070 Interrupts
The VRS51L2070 has a comprehensive set of 49
interrupt sources and uses 16 interrupt vectors to
handle them. The interrupts are categorized in two
distinct groups:
• Module interrupt
• Pin change interrupts
The module interrupts include interrupts that are
generated by VRS51L2070 peripherals such as the
UARTs, SPI, I²C , PWC and port change monitoring
modules.
As their name implies, the pin change interrupts are
interrupts that are generated by predefined conditions
at the physical pin level: . The pin change interrupts
can be caused by a level or an edge (rising or falling)
on a given pin. Standard 8051 INT0 and INT1
interrupts are considered pin change interrupts. The
VRS51L2070 includes INT0 and INT1, as well as 14
other pin interrupts distributed on ports 0 and 3.
The interrupt sources share 16 interrupt vectors from
00h to 7Bh. Each interrupt vector can be configured to
respond to either a pin change interrupt or a module
interrupt. The two following diagrams provide an
overview of the VRS51L2070 modules/pin interrupt
structure, the associated SFR registers and the
interaction among the interrupt management SFRs.
FIGURE 34: INTERRUPT SOURCES DETAILED VIEW
Module
0
Pin
1
INTPININVx.y bit
0
INTPINFx.y
bit
1
INTENx.y bit
INTSRCx.y bit
To Interrupt
Controller
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