AN92584 Datasheet, PDF (40/42 Pages) Ramtron International Corporation – Designing for Low Power and Estimating Battery Life for BLE Applications

Designing for Low Power and Estimating Battery Life for BLE Applications
Stage
A
B
C
H
I
D
F
J
G
Table 15. Connection Current Profile States
BLESS Internal State
CYBLE_BLESS_STATE_ECO_ON
CYBLE_BLESS_STATE_ECO_STABLE
CYBLE_BLESS_STATE_ACTIVE
CYBLE_BLESS_STATE_ACTIVE
CYBLE_BLESS_STATE_ACTIVE
CYBLE_BLESS_STATE_ACTIVE
Connection Profile State
Oscillator Startup
Oscillator Stabilization
Event Start Delay
Receive
Inter-Frame Space
Transmit
Power Modes
BLESS
System
DEEPSLEEP
Active
Deep-Sleep
DEEPSLEEP
Active
Sleep
ACTIVE
Active
Sleep
ACTIVE
Sleep
ACTIVE
Sleep
ACTIVE
Sleep
CYBLE_BLESS_STATE_EVENT CLOSE
Post-Processing
ACTIVE
Active
CYBLE_BLESS_STATE_DEEPSLEEP
CYBLE_BLESS_STATE_DEEPSLEEP
Enter Deep-Sleep (takes
two LFCLK cycles)
Deep-Sleep
DEEPSLEEP
DEEPSLEEP
Sleep
Deep-Sleep
The BLESS is in the DEEPSLEEP mode (stage G) between the connection events. The system may also be in the
Deep-Sleep mode if no processing is required. The BLESS maintains the link timing by using the low-frequency WCO
because the ECO is OFF. The BLESS automatically wakes up at the programmed instant before the start of the
connection event and generates an interrupt to wake up the system from the Deep-Sleep mode.
Stages A, B, and C in the connection current profile remain the same as that for the advertising current profile.
H – The device first listens to a packet from the Central device. The duration of this first listening window depends on
the drift caused by clock inaccuracies (measured in ppm) of the crystal oscillator (WCO in this case) used by the
Central and Peripheral devices between the events.
I – After receiving a packet, the Peripheral waits for an Inter-Frame Space time interval (T_IFS) of 150 µs (per the
BLE specification).
D – After waiting for T_IFS, the Peripheral transmits a response packet. The entire BLESS including the RF is active
during this period.
F – After transmitting the three advertising packets, the BLESS generates an “end-of-event” interrupt that wakes up
the CPU. The BLE stack and application complete any event-specific or other application-specific activities in this
period. The application then programs the BLESS to enter the DEEPSLEEP mode by calling the
CyBle_EnterLPM()function in the BLE Component. The BLESS takes two LFCLK cycles (~120 µs) to switch to
the WCO and enter the DEEPSLEEP mode internally. The BLE Component therefore puts the system into the Sleep
mode until the DEEPSLEEP mode entry is complete.
J – The system is in the Sleep mode in this state, waiting for the BLESS to enter the DEEPSLEEP mode. Once the
transition is complete, the BLESS generates an interrupt to indicate successful entry into the DEEPSLEEP mode,
which wakes up the CPU.
G – When the application receives the interrupt at the end of stage J, the application puts the system also into the
Deep-Sleep mode, if no processing is required.
Note: In the profile described, it is assumed that the application is only managing a BLE connection event and not
handling any system-level tasks and interrupts. Additional system-level processing will change the current profile
depending on the implementation.
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Document No. 001-92584 Rev. *A
40