SP2-433-160 Datasheet, PDF (5/27 Pages) Radiometrix Ltd – UHF SpacePort Transceiver

2 THE HOST INTERFACE
2.1 SIGNALS
It is recommended that the SP2 be assigned to a byte wide bi-directional I/O port on the host processor.
The port must be such that the 4 data lines can be direction controlled without affecting the 4
handshake line.
pin
pin
name number
pin
function
I/O description
TXR
TXA
15
TX Request I/P
Data transfer request from HOST to SP2
14
TX Accept O/P
Data accept handshake back to HOST
RXR
RXA
13
RX Request O/P
Data transfer request from SP2 to HOST
12
RX Accept I/P
Data accept handshake back to SP2
D0
17
Data 0 (4) Bi-dir 4 bit bi-directional data bus. Tri-state
D1
18
Data 1 (5) Bi-dir between packet transfers, Driven on
D2
19
Data 2 (6) Bi-dir receipt for Accept signal until packet
D3
20
Data 3 (7) Bi-dir transfer is complete.
notes: 1. The 4 Handshake lines are active low
2. The 4 Data lines true data
3. Logic levels are 5V CMOS, see electrical specifications
4. Input pins have a weak pull-up internally
RESET
The Reset signal, may either be driven by the host (recommended) or pulled up to Vcc via a
suitable resistor (10kΩ). A reset aborts any transfers in progress and restarts the Packet
Controller.
HOST DRIVEN RESET
Minimum low time: 1.0 µs, after reset is released (returned high). The host should allow a delay
1ms after reset for the SP2 to initialise itself
During this delay the host must hold TXR high (unless DIAGNOSTIC MODES are required) and
RXR signal should be ignored.
D0
D1
D2
D3
Host
Processor
SP2-433-160
BiM2-433-160
Transceiver
RESET
figure 4: Host to SP2 connection
Radiometrix Ltd, SP2 data sheet
page 5