SP2-433-160 Datasheet, PDF (10/27 Pages) Radiometrix Ltd – UHF SpacePort Transceiver

SP2 Memory READS:
Host issues just the control byte, with bit 6 (W/R) cleared, bit 7 (PT) set and the memory address. The
SP2 will respond with 2 bytes, the first is a control byte which is an echo of the control byte just issued
by the host, this is useful if the host is using an interrupt handler. The 2nd byte is the memory contents.
SP2 Memory WRITES:
Host issues 2 bytes, the first is the control byte with bit 6 (W/R) set, bit 7 (PT) set and the memory
address. The 2nd byte is the data to be written. The SP2 does not give a response to memory writes.
PT W/R A5
7
6
5
A4 A3
4
3
A2
2
A1 A0
1
0
R/W - Memory Read / Write
R/W Function
0 Read from RPC's memory
1 Write to RPC's memory
PT - Packet Type
1 = Memory Transfer Packet
figure 10: Control byte for memory access
A5 - A0 - 6 RPC Memory Address
Notes Memory writes to locations 01 to 3F, write to the non-volatile EEPROM in the SP2. The
EEPROM has a limit of 100,000 write cycles therefor it's use must be restricted to infrequently
changed data. The SP2 only writes to the EEPROM when instructed to by the HOST. Each byte
takes 10ms to write. To prevent accidental/spurious writes to EEPROM the host must set the
WE bit in SWITCHES prior to EACH byte to be written. We recommend that the host performs
a read/verify after each byte write to EEPROM.
The above does not apply to any memory reads nor to writes to SWITCHES (address 00h).
Radiometrix Ltd, SP2 data sheet
page 10