HYS64T32000EU-25F-B2 Datasheet, PDF (70/95 Pages) Qimonda AG – 240-Pin unbuffered DDR2 SDRAM Modules

Product Type
Internet Data Sheet
HYS[64/72]T[32/64/128][0/9]xxEU-[25F/2.5/3/3S/3.7]-B2
Unbuffered DDR2 SDRAM Module
Organization
Label Code
JEDEC SPD Revision
Byte#
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
Description
PLL Relock Time
T_CASE.MAX Delta / ∆T_4R4W Delta
Psi(T-A) DRAM
∆T₀ (DT0)
∆T_2N (DT2N, UDIMM) or ∆T_2Q (DT2Q, RDIMM)
∆T_2P (DT2P)
∆T_3N (DT3N)
∆T_3P.fast (DT3P fast)
∆T_3P.slow (DT3P slow)
∆T_4R (DT4R) / ∆T_4R4W Sign (DT4R4W)
∆T_5B (DT5B)
∆T₇ (DT7)
Psi(ca) PLL
Psi(ca) REG
∆T_PLL (DTPLL)
∆T_REG (DTREG) / Toggle Rate
SPD Revision
Checksum of Bytes 0-62
Manufacturer’s JEDEC ID Code (1)
Manufacturer’s JEDEC ID Code (2)
Manufacturer’s JEDEC ID Code (3)
Manufacturer’s JEDEC ID Code (4)
Manufacturer’s JEDEC ID Code (5)
Manufacturer’s JEDEC ID Code (6)
256MB 256MB 512MB 512MB 512MB 512MB
×64
×64
×64
×64
×72
×72
1 Rank 1 Rank 1 Rank 1 Rank 1 Rank 1 Rank
(×16) (×16) (×8)
(×8)
(×8)
(×8)
PC2– PC2– PC2– PC2– PC2– PC2–
5300U– 5300U– 5300U– 5300U– 5300E– 5300E–
555
555
555
555
555
555
Rev. 1.2 Rev. 1.2 Rev. 1.2 Rev. 1.2 Rev. 1.2 Rev. 1.2
HEX
00
54
7A
67
34
36
27
4C
2A
5A
20
38
00
00
00
00
12
34
7F
7F
7F
7F
7F
51
HEX
00
54
7A
67
34
36
27
4C
2A
5A
20
38
00
00
00
00
12
34
7F
7F
7F
7F
7F
51
HEX
00
50
7A
4B
34
36
27
4C
2A
4C
20
23
00
00
00
00
12
20
7F
7F
7F
7F
7F
51
HEX
00
50
7A
4B
34
36
27
4C
2A
4C
20
23
00
00
00
00
12
20
7F
7F
7F
7F
7F
51
HEX
00
50
7A
4B
34
36
27
4C
2A
4C
20
23
00
00
00
00
12
32
7F
7F
7F
7F
7F
51
HEX
00
50
7A
4B
34
36
27
4C
2A
4C
20
23
00
00
00
00
12
32
7F
7F
7F
7F
7F
51
Rev. 1.0, 2006-10
70
10202006-L0SM-FEYT