HYS72T256023 Datasheet, PDF (27/41 Pages) Qimonda AG – 240-Pin Registered DDR2 SDRAM Modules

Internet Data Sheet
HYS72T[512/256]02xHR–[3S/3.7/5]–A
Registered DDR2 SDRAM Modules
2) ODT turn off time min. is when the device starts to turn off ODT resistance. ODT turn off time max is when the bus is in high impedance.
Both are measured from t_AOFD. Both are measured from t_AOFD, which is interpreted differently per speed bin. For DDR2-400/533, t_AOFD is
12.5 ns (= 2.5 x 5 ns) after the clock edge that registered a first ODT HIGH if t_CK = 5 ns.
Rev. 1.2, 2007-01
27
03292006-AYVF-ZIIJ