HYI25D512160C Datasheet, PDF (22/35 Pages) Qimonda AG – 512-Mbit Double-Data-Rate SDRAM

Internet Data Sheet
HYI25D512160C[C/E/F/T]
512-Mbit Double-Data-Rate SDRAM
TABLE 17
Input and Output Capacitances
Parameter
Symbol
Min.
Values
Unit
Typ. Max.
Note/
Test Condition
Input Capacitance: CK, CK
C_I1
2.0
—
3.0
pF
TSOPII¹⁾
1.5
—
2.5
pF
TFBGA ¹⁾
Delta Input Capacitance
C_dI1
Input Capacitance: All other input-only pins C_I2
—
—
1.5
—
2.0
—
0.25 pF
2.5
pF
3.0
pF
1)
TFBGA ¹⁾
TSOPII ¹⁾
Delta Input Capacitance: All other input-only C_dIO
pins
—
—
0.5
pF
1)
Input/Output Capacitance: DQ, DQS, DM C_IO
3.5
—
4.0
—
4.5
pF
5.0
pF
TFBGA ¹⁾²⁾
TSOPII ¹⁾²⁾
Delta Input/Output Capacitance: DQ, DQS, C_dIO
DM
—
—
0.5
pF
1)
1) These values are guaranteed by design and are tested on a sample base only. V_DDQ = V_DD = 2.5 V ± 0.2 V, f = 100 MHz, T_A = 25 °C,
V_OUT(DC) = V_DDQ/2, V_OUT (Peak to Peak) 0.2 V. Unused pins are tied to ground.
2) DM inputs are grouped with I/O pins reflecting the fact that they are matched in loading to DQ and DQS to facilitate trace matching at the
board level.
Rev. 1.0, 2006-11
22
11082006-S9OT-UFSN