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| HYB39S256407FE Datasheet, PDF (18/27 Pages) Qimonda AG – 256-MBit Synchronous DRAM | |||
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Internet Data Sheet
HY[B/I]39S256[40/80/16][0/7]F[E/T/F](L)
256-MBit Synchronous DRAM
Parameter
Self Refresh Current (standard components)
Self Refresh Mode, CKE=0.2V, tCK=infinity
Self Refresh Current (low power components)
Self Refresh Mode, CKE=0.2V, tCK=infinity
Symbol
IDD6
Symbol
TABLE 12
IDD Specifications and Conditions
â6 â7 Unit Note/ Test Condition1)2)
Max.
IDD1
IDD2P
IDD2N
IDD3N
IDD3P
IDD4
IDD5
IDD6
tRC = tRC(min), IO = 0 mA
CS =VIH (min.), CKE â¤VIL(max)
CS =VIH (min.), CKE⥠VIH(min)
CS = VIH(min), CKE â¥VIH(min.)
CS = VIH(min), CKE ⤠VIL(max.)
tRFC = tRFC(min)
tRFC= 7.8 μs
100 80 mA
2 2 mA
26 22 mA
40 35 mA
5 5 mA
65 57 mA
168 142 mA
25 25 mA
3 3 mA
1.05 1.05 mA
3)4)
2)
2)
2)
2)
2)3)
5)
Standard components
Low power components 6)
1) Currents values will be added when available.
2) TA = 0 to 70 °C; VSS = 0 V; VDD, VDDQ = 3.3 V ± 0.3 V
3) These parameters depend on the cycle rate. All values are measured at 166 MHz for -6, at 133 MHz for -7 and -7.5 and at 100 MHz for -
8 components with the outputs open. Input signals are changed once during tCK.
4) These parameters are measured with continuous data stream during read access and all DQ toggling. CL=3 and BL=4 is assumed and
the VDDQ current is excluded.
5) tRFC = tRFC(min) âburst refreshâ, tRFC =7.8 μs âdistributed refreshâ
6) 1.05 mA at 85 °C, 1.00 mA at 60 °C
Rev. 1.42, 2007-09
18
03292006-TMTK-JFEU
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