HYB39S256407FE Datasheet, PDF (14/27 Pages) Qimonda AG – 256-MBit Synchronous DRAM

Internet Data Sheet
HY[B/I]39S256[40/80/16][0/7]F[E/T/F](L)
256-MBit Synchronous DRAM
%$ %$ $ $ $ $ $ $ $ $ $ $ $ $ $
     :%/
70
&/
%7
%/
UHJDGGU
Z
Z
Z
Z
03%6
Field
BL
Bits
Type
2:0
w
BT
3
CL
6:4
TM
8:7
WBL
9
12:10
Description
TABLE 6
Mode Register Definition (BA_1:0 = 00_B)
Burst Length
Note: All other bit combinations are RESERVED
000_B 1
001_B 2
010_B 4
011_B 8
111_B Full Page (Sequential burst type only)
Burst Type
0_B Sequential
1_B Interleaved
CAS Latency
Number of full clocks from read command to first data valid window.
Note: All other bit combinations are RESERVED.
010_B 2
011_B 3
Test Mode
Note: All other bit combinations are RESERVED.
00_B Mode register set
Write Burst Length
0_B Burst write
1_B Single bit write
Reserved, set to zero
Rev. 1.42, 2007-09
14
03292006-TMTK-JFEU