|
PCS5I961C Datasheet, PDF (5/14 Pages) PulseCore Semiconductor – Low Voltage Zero Delay Buffer | |||
|
◁ |
November 2006
rev 0.3
PCS5I961C
Table 6: DC CHARACTERISTICS (VCC = 2.5V ± 5%, TA = â40° to 85°C)
Symbol
Characteristic
Min
Typ
Max
Unit
Condition
VIH Input HIGH Voltage
1.7
VCC + 0.3 V
LVCMOS
VIL Input LOW Voltage
-0.3
VOH Output HIGH Voltage
1.8
VOL Output LOW Voltage
0.7
V
LVCMOS
V
IOH = â15mA1
0.6
V
IOL = 15mA1
ZOUT Output Impedance
18
26
â¦
IIN
Input Current
±120
mA
CIN Input Capacitance
4.0
pF
CPD Power Dissipation Capacitance
8.0
10
pF
Per Output
ICCA Maximum PLL Supply Current
2.0
5.0
mA
VCCA Pin
ICC Maximum Quiescent Supply Current
TBD
mA
All VCC Pins
VTT Output Termination Voltage
VCC ÷2
V
Note: 1.The PCS5I961C is capable of driving 50⦠ï transmission lines on the incident edge. Each output drives one 50⦠ï parallel terminated transmission line to
a termination voltage of VTT. Alternatively, the device drives up two 50⦠ï series terminated transmission lines.
Table 7: AC CHARACTERISTICS (VCC = 2.5V ± 5%, TA = 40°C to +85°C)1
Symbol
Characteristic
Min
Typ
fref
Input Frequency
F_RANGE = 0
F_RANGE = 1
100
50
fmax
Maximum Output
Frequency
F_RANGE = 0
F_RANGE = 1
100
50
frefDC Reference Input Duty Cycle
25
tr, tf
TCLK Input Rise/Fall Time
t(â
)
Propagation Delay
(static phase offset)
CCLK to FB_IN
-80
tsk(O)
OutputâtoâOutput Skew2
90
DCO Output Duty Cycle
F_RANGE = 0
F_RANGE = 1
40
50
45
50
tr, tf
Output Rise/Fall Time
0.1
tPLZ,HZ Output Disable Time
tPZL,LZ
tJIT(CC)
Output Enable Time
CycleâtoâCycle Jitter
RMS (1Ï)3
tJIT(PER) Period Jitter
RMS (1Ï)
7.0
tJIT(â
)
I/O Phase Jitter
RMS (1Ï)
tlock
Maximum PLL Lock Time
Note: 1 AC characteristics apply for parallel output termination of 50⦠to VTT.
2 See applications section for partâtoâpart skew calculation
3 See applications section for calculation for other confidence factors than 1Ï
Max Unit Condition
200
100
MHz
200
100
MHz
75
%
3.0
nS 0.7 to 1.7V
120
pS PLL locked
150
pS
60
55
%
1.0
nS 0.6 to 1.8V
10
nS
10
nS
15
pS
10
pS
15
nS
10
mS
Low Voltage Zero Delay Buffer
Notice: The information in this document is subject to change without notice.
5 of 14
|
▷ |