PT6311_10 Datasheet, PDF (4/22 Pages) Princeton Technology Corp – VFD Driver/Controller IC

PT6311
PIN DESCRIPTION
Pin Name
I/O
SW1 to SW4
I
DOUT
O
DIN
I
NC
-
CLK
I
STB
I
K1 to K4
I
VDD
-
SG1/KS1 to SG12/KS12
O
SG20/GR9 to SG19/GR10
SG18/GR11 to SG13/GR16
O
VEE
-
GR1 to GR8
O
LED1 to LED5
O
GND
-
OSC
I
Description
General Purpose Input Pins
Data Output Pin (N-Channel, Open-Drain)
This pin outputs serial data at the falling edge of the shift
clock (starting from the lower bit).
Data Input Pin
This pin inputs serial data at the rising edge of the shift
clock (starting from the lower bit).
No Connection
Clock Input Pin
This pin reads serial data at the rising edge and outputs
data at the falling edge.
Serial Interface Strobe Pin
The data input after the STB has fallen is processed as a
command. When this in is “HIGH”, CLK is ignored.
Key Data Input Pins
The data inputted to these pins is latched at the end of the
display cycle.
Logic Power Supply
High-Voltage Segment Output Pins
Also acts as the Key Source.
High-Voltage Segment/Grid Output Pins
Pull-Down Level
High-Voltage Grid Output Pins
LED Output Pin
Ground Pin
Oscillator Input Pin
A resistor is connected to this pin to determine the
oscillation frequency.
Pin No.
1 to 4
5
6
7
8
9
10 to 13
14, 33, 45
15 to 26
36 to 35
32 to 27
34
44 to 37
50 to 46
51
52
V3.2
4
November 2009