PE99153 Datasheet, PDF (4/15 Pages) Peregrine Semiconductor – Radiation Hardened UltraCMOS Monolithic Point-of-Load Synchronous Buck Regulator with Integrated Switches

PE99153
Product Specification
Figure 3. Pin Layout (Top View)
AGND ¹
VREF ²
EAINP ³
EAINM ⁴
EAOUT ⁵
ISET ⁶
ICOMP ⁷
RSET ⁸
32 31 30 29 28 27 26 25
Ground
Paddle
(backside)
9 10 11 12 13 14 15 16
24 _GND
23 _OUT
22 _OUT
21 _OUT
20 OUT
19 _OUT
18 _GND
17 _GND
Package Mechanical Details
500 mil x 500 mil CQFP hermetic with gullwing leads
32 pins, 50-mil lead pitch
Alumina body, Kovar lid
Table 3. Pin Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12, 15, 16, 17,
18, 24, 25, 29
13, 14, 26, 27,
28
19, 20, 21, 22,
23
30
31
32
Paddle
Pin Name
Description
AGND
Analog ground
VREF
1.000V reference output, loop to
EAINP Additional low pass filtering
may be necessary
EAINP Error Amplifier (+) input, loop to VREF
EAINM Error Amplifier (-) input, load feedback
EAOUT Error Amplifier output/loop to ISET
ISET Current Setpoint input/loop to EAOUT
ICOMP
Variable current compensation/
resistor to VOUT
RSET Resistor to set reference current
SYNCOb Loopthrough complement output
PGOOD Power Good flag output
RSEL Reference resistor selection
GND Input power/signal ground
V_IN
Input power supply
OUT
SDb
SYNC
SScap
GND
Switch power output
Shutdown (L)/enable input
Oscillator sync input or int. osc
freq select
Soft Start timing cap input
Ground for proper operation
Table 4. Operating Ranges
Symbol
Parameter/Condition
V_IN
Power supply voltage
T_C
Operating temperature range
(case)
Min Max Unit
4.6 6.0
V
-55 125
o_C
Note: Operation should be restricted to the limits in the Operating Ranges table
Table 5. Absolute Maximum Ratings
Symbol
Parameter/Condition
Min Max Unit
V_IN
Power supply voltage
-0.5 6.5
V
T_J
Operating temperature range
(junction)
-55 145
o_C
T_ST
Storage temperature range (case) -65 150
o_C
I_I
DC into any signal input
-10 10 mA
I_O
DC into any signal output
-50 50 mA
I_P
DC into any single power pin
-2
2
A
Exceeding absolute maximum ratings may cause
permanent damage. Operation between maximum
operating ranges and absolute maximum operating
ranges for extended periods may reduce reliability.
Table 6. Electrostatic Discharge (ESD) Ratings
Model
Parameter/Condition
Min Max Unit
HBM
V_ESD All pins
1000
V
Note: Human Body Model ESD Voltage (HBM, MIL_STD 883 Method 3015.7)
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS^® device, observe the
same precautions that you would use with other ESD
-sensitive devices. Although this device contains
circuitry to protect it from damage due to ESD,
precautions should be taken to avoid exceeding the
specified rating.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS^®
devices are immune to latch-up.
ELDRS
The UltraCMOS^® process does not exhibit enhanced
low-dose-rate sensitivity (ELDRS) since bipolar
minority carrier elements are not used.
©2010-2013 Peregrine Semiconductor Corp. All rights reserved.
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Document No. DOC-29414-2 │ UltraCMOS^® Power Management Solutions