PE99153 Datasheet, PDF (12/15 Pages) Peregrine Semiconductor – Radiation Hardened UltraCMOS Monolithic Point-of-Load Synchronous Buck Regulator with Integrated Switches

In external RSET mode, the PE99153 senses the
voltage applied to the ISET pin (from the EAOUT pin,
through the compensation network) and subtracts the
resulting reference current offset. This subtraction is then
applied to the RSET pin. This voltage at the RSET pin
draws current through the RSET resistor. This current is
used as a current threshold to set the peak inductor
current in the current mode control loop. The maximum
voltage at the RSET pin is limited to VMAXRSET in
Table 2 independent of the voltage applied to the ISET
pin. Since this voltage is limited, the maximum reference
current through the R_SET resistor is limited to
VMAXRSET/R_SET.
After a reference current is generated through the R_SET
pin, the current is multiplied by the G_IREF parameter listed
in Table 2. Thus the peak current allowed by the current
mode control loop will be limited to:
I_LIMIT = G_IREF x (VMAXRSET/R_SET) - ∆ICOMP
Solving for R_SET
R_SET = (G_IREF x VMAXRSET) / (I_LIMIT + ∆ICOMP)
Slope Compensation Ramp Selection
While providing improved bandwidth and inherent current
limiting, all current mode control switching regulators
require slope compensation to ensure stability across all
applications conditions. The PE99153 provides
adjustable slope compensation to allow the designer to
optimize transient response and stability requirements.
During steady state, a compensation ramp is created at
the ICOMP pin. The RC ramp is created by the external
R_COMP resistor and an internal capacitor. The ramp is
reset any time the low side switch is on by means of a
reset switch. The voltage at the ICOMP pin is multiplied
by the G_Iref parameter in Table 2 and is subtracted from
the reference current of the current threshold
comparator.
Before calculating the required slope compensation to
ensure stability, a related slope is defined. In steady
state, when the low side switch is on, the inductor current
ramps down at a rate of M₂. M₂ is given as V_OUT/L, where
L is the inductance of the output inductor.
The minimum slope compensation ramp current, M_a
required for mathematical steady state stability under all
conditions is one half of M₂. That is:
M_a≥M₂/2
To provide margin to the minimum, a compensation
slope equal to M₂ is recommended:
M_a = M₂
PE99153
Product Specification
Given the required compensation current (M_a), the
voltage ramp rate at the ICOMP pin can be calculated by
dividing by the G_ICOMP parameter in Table 2.
∆VICOMP = ∆ICOMP / G_ICOMP, where
∆ICOMP = (∆IL x ∆t_on x M_a/M₂) / ∆t_off and ∆VICOMP =
(0.95 x V_OUT2) / CICOMP x R_COMP x F_SW x V_IN)
Next, substituting for ∆IL from the output inductor
equation and given the required voltage ramp rate and
the internal capacitance connected to the ICOMP pin,
CICOMP in Table 2, the resistor connected from V_OUT to
the ICOMP pin can be calculated:
R_COMP = (0.95 x G_ICOMP x L) / (CICOMP x M_a/M₂),
where 95% of V_OUT is used to achieve a linear
approximation of the average current through CICOMP,
assuming the voltage drop over 1 cycle varies from 100
to 90%.
Figure 11. PE99153 Slope Compensation
Slope Compensation
Ma
M1 M2
Δt_on Δt_off
Inductor Current
VMAXRSET
G_IREF =
ΔI_{COM P}
R_SET
ΔI_{L ILOAD AVG}
Time
Voltage Control Loop Compensation
Network Design
The PE99153 contains a current mode control loop and
a voltage mode control loop as shown in Figure 12.
The current mode control loop, to first order, controls
average inductor current and so behaves as a current
source. Conceptually, the current mode control loop can
be replaced with a voltage controlled current source.
External to the compensation network, the resulting
network contains one pole in the voltage control loop.
This pole is created by the parallel combination of
Cout and the Load Resistance and is located at:
1/(2πR_LOADC_OUT)
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