PE613010 Datasheet, PDF (3/8 Pages) Peregrine Semiconductor – UltraCMOS SPST Tuning Control Switch, 100-3000 MHz

PE613010
Product Specification
Figure 3. Pin Configuration (Top View)
Table 2. Pin Descriptions
Pin #
1
2
3
4
5
6
7
8
9
10
11
Pin Name
RF–
RF–
GND
V_DD
GND
GND
V1
RF+
RF+
GND
GND
Description
Negative RF Port¹
Negative RF Port¹
Ground²
Power Supply Pin
Ground²
Ground²
Switch control input, CMOS logic level
Positive RF Port¹
Positive RF Port¹
Ground²
Exposed Ground Paddle²
Notes: 1. Multiple RF pins are provided for flexibility. They can be tied together for
optimal RF performance, or used individually (leave unused pin floating).
2. For optimal performance, recommend tying Pins 3, 5, 6, 10, 11 together
on PCB.
Moisture Sensitivity Level
The Moisture Sensitivity Level rating for the
PE613010 in the 10-lead 2  2  0.55 mm QFN
package is MSL1.
Table 3. Truth Table
State
V1
Switch OFF
0
Switch ON
1
Table 4. Operating Ranges
Parameter
Min Typ Max Unit
V_DD Supply Voltage
I_DD Power Supply Current
(V_DD = 2.75V, 25°C)
V_IH Control Voltage High
2.30 2.75 5.50 V
140 200 µA
1.2 1.8 3.1 V
V_IL Control Voltage Low
Peak Operating RF Voltage^1,2
100 MHz–3 GHz
0
0 0.57 V
25³ Vpk
T_OP Operating Temperature Range
–40 +25 +85 °C
Notes:
1. Between all RF ports, and from RF ports to GND.
2. Pulsed RF input duty cycle of 50% and 4620 µs, measured per 3GPP
TS 45.005.
3. RF input power of 38 dBm (50Ω, SWON) and 32 dBm (50Ω, SWOFF).
Table 5. Absolute Maximum Ratings
Symbol
Parameter/Conditions
Min
V_DD Supply Voltage
–0.3
V_CTRL Digital Input Voltage (V1)
–0.3
T_ST Storage Temperature Range
–65
V_ESD,HBM HBM ESD Voltage, All Pins*
Note: * Human Body Model (MIL_STD 883 Method 3015.7).
Max
5.5
3.6
+150
2000
Unit
V
V
°C
V
Exceeding absolute maximum ratings may cause
permanent damage. Operation should be restricted
to the limits in the Operating Ranges table.
Operation between operating range maximum
and absolute maximum for extended periods
may reduce reliability.
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS device, observe
the same precautions that you would use with other
ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the specified rating.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS
devices are immune to latch-up.
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