LP28009 Datasheet, PDF (11/12 Pages) Lowpower Semiconductor inc – Internal Integrate P-MOSFETs

Preliminary Datasheet
LP28009
the BATT pin and GND is typically sufficient.
Temperature Regulation and Thermal Protection
In order to maximize the charge rate, the LP28009
features a junction temperature regulation loop. If the
power dissipation of the IC results in a junction
temperature greater than the thermal regulation
threshold (125°C), theLP28009 throttles back on the
charge current in order to maintain a junction
temperature around the thermal regulation threshold
(125°C). The LP28009 monitors the junction
temperature, TJ, of the die and disconnects the battery
from the input if TJ exceeds 125°C. This operation
continues until junction temperature falls below
thermal regulation threshold (125°C) by the hysteresis
level. This feature prevents the chip from damage.
Selecting the Input and Output Capacitors
In most applications, the most important is the
high-frequency decoupling capacitor on the input of
the LP28009.A 1uF ceramic capacitor, placed in close
proximity to input pin and GND pin is recommended. In
some applications depending on the power supply
characteristics and cable length, it may be necessary
to add an additional 10uFceramic capacitor to the
input.
The LP28009 requires a small output capacitor for
loop stability. A 1uF ceramic capacitor placed between
Layout Consideration
The LP28009 is a fully integrated low cost single-cell
Li-Ion battery charger ideal for portable applications.
Careful PCB layout is necessary. For best
performance, place all peripheral components as close
to the IC as possible. A short connection is highly
recommended. The following guide lines should be
strictly followed when designing a PCB layout for the
LP28009.Input capacitor should be placed close to IC
and connected to ground plane.
The trace of input in the PCB should be placed far
away the sensitive devices or shielded by the ground.
The GND should be connected to a strong ground
plane for heat sinking and noise protection. The
connection of RSETA should be isolated from other
noisy traces.
The short wire is recommended to prevent EMI and
noise coupling.
Output capacitor should be placed close to IC and
connected to ground plane to reduce noise coupling.
When PCB has poor layout, the 10uF is recommended
to prevent noise.
LP28009 – 02
May.-2013
Email: [e-mail]
www.lowpowersemi.com
Page 11 of 12