ZY1015 Datasheet, PDF (7/17 Pages) Power-One – 15A No-Bus POL 3V to 14V Input 0.5V to 5.5V Output

ZY1015 15A No-Bus POL Data Sheet
3V to 14V Input • 0.5V to 5.5V Output
4.5 Signal Specifications
Parameter
VDD
ViL_s
ViH_s
Conditions/Description
Internal supply voltage
SYNC Line
LOW level input voltage
HIGH level input voltage
Vhyst_s
Hysteresis of input Schmitt trigger
IoL_s
Ipu_s
Tr_s
Cnode_s
Freq_s
Tsynq
LOW level sink current V(SYNC)=0.5V
Pull-up current source V(SYNC)=0V
Maximum allowed rise time 10/90%VDD
Added node capacitance
Clock frequency of external SYNC line
Sync pulse duration
Min
3.15
-0.5
0.75 x
VDD
0.25 x
VDD
14
300
475
22
Nom
3.3
5
T0
Iup_x
ViL_x
ViH_x
Vhyst_x
RdnL_x
Iup_PG
Iup_OK
ViL_x
ViH_x
Vhyst_x
IoL_x
Iup_CS
ViL_CS
ViH_CS
Vhyst_CS
IoL_CS
Tr_CS
Data=0 pulse duration
72
Inputs: INTL0…INTL4, CCA0…CCA2, EN, ENP, IM
Pull-up current source V(X)=0
25
LOW level input voltage
-0.5
HIGH level input voltage
0.7 x VDD
Hysteresis of input Schmitt trigger
0.1 x VDD
External pull down resistance
pin forced low
Power Good and OK Inputs/Outputs
Pull-up current source V(PG)=0
25
Pull-up current source V(OK)=0
175
LOW level input voltage
-0.5
HIGH level input voltage
0.7 x VDD
Hysteresis of input Schmitt trigger
0.1 x VDD
LOW level sink current at 0.5V
4
Current Share/Sense Bus
Pull-up current source at V(CS)=0V
0.84
LOW level input voltage
HIGH level input voltage
Hysteresis of input Schmitt trigger
LOW level sink current V(CS)=0.5V
-0.5
0.75 x
VDD
0.25 x
VDD
14
Maximum allowed rise time 10/90% VDD
Max
Units
3.45
V
0.3 x VDD
V
VDD + 0.5
V
0.45 x
VDD
V
60
mA
1000
µA
300
ns
10
pF
525
kHz
28
% of clock
cycle
78
% of clock
cycle
110
µA
0.3 x VDD
V
VDD+0.5
V
0.3 x VDD
V
10
kΩ
110
µA
725
µA
0.3 x VDD
V
VDD+0.5
V
0.3 x VDD
V
20
mA
3.10
mA
0.3 x VDD
V
VDD+0.5
V
0.45 x
VDD
V
60
mA
100
ns
REV. 1.2 MAR 14, 2007
www.power-one.com
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