DP8105 Datasheet, PDF (16/35 Pages) Power-One – 8V to 14V Input , 0.7V to 5.5V Output

DP8105 5A DC-DC Intelligent dPOL Data Sheet
8V to 14V Input • 0.7V to 5.5V Output
1.1 Turn-Off Characteristics
Turn of captures show that combining turn off delays
and ramp rates. Note that while turnoff delays have a
lower upper time limit as compared to turn on delays,
all ramp down rates are available independently to
turn on and off.
Figure 26. Tracking Turn-Off. Falling Slew Rate is
Programmed at 0.5V/ms.
Figure 27. Turn-Off with Tracking and Sequencing. Falling
Slew Rate is Programmed at 0.5V/ms.
7.4 Faults Errors and Warnings
All dPOL series converters have a comprehensive
set of programmable fault and error protection
functions that can be classified into three groups
based on their effect on system operation: warnings,
faults, and errors. These are warnings, errors and
faults. Warnings include Thermal (Overtemperature
limit near) and Power Good (a warning in a negative
sense.)
Faults in DP8000 dPOLs include overcurrent
protection, overvoltage, overtemperature and
tracking failure detection. Errors include only
undervoltage. Control of responses to Faults and
Errors are distributed between different dPOL
registers and are configurable in the GUI.
Thresholds of overcurrent, over- and undervoltage
detection, and Power Good limits can be
programmed in the GUI Output Configuration
window (Figure 11) or directly via the I²C bus by
writing into the PC2 registers shown in Figure 28.
PC2: Protection Configuration Register 2 ¹⁾
Address: 0x01
U
U R/W-0 R/W-0 R/W-1 R/W-0 R/W-0 R/W-0
---
--- PGHL PGLL OVPL1 OVPL0 UVPL1 UVPL0
Bit 7
Bit 0
Bit7:6 Unimplemented: read as ‘0’
Bit 5 PGHL: Power Good High Level
1 = 105% of Vo
0 = 110% of Vo (default)
Bit 4 PGLL: Power Good Low Level
1 = 95% of Vo
0 = 90% of Vo (default)
Bit 3:2 OVPL: Over Voltage Protection Level
00 = 110% of Vo
01 = 120% of Vo
10 = 130% of Vo (default)
11 = 130% of Vo
Bit 1:0 UVPL: Under Voltage Protection Level
00 = 75% of Vo (default)
01 = 80% of Vo
10 = 85% of Vo
11 = 90% of Vo
1) _{This register can only be written when PWM is not active (RUN[RUN] is ‘0’)}
Figure 28. Protection Configuration Register PC2
Note that the overvoltage and undervoltage
protection thresholds and Power Good limits are
defined as percentages of the output voltage.
Therefore, the absolute levels of the thresholds
change when the output voltage setpoint is changed
either by output voltage adjustment or by margining.
Overcurrent limits are set either in the GUI dPOL
Output configuration dialog or in the dPOL's CLS
register as shown Figure 29
Note that the CLS register includes bits which control
the Regulation option settings. When writing into this
register be careful to not change Regulation by
accident.
BCD.00261 Rev. 1.0, 12 Feb 2013
www.power-one.com
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