PM5313 Datasheet, PDF (33/646 Pages) PMC-Sierra, Inc – SONET/SDH Payload Extractor/Aligner for 622 Mbit/s Interfaces

PRODUCTION
DATASHEET
PMC-1981162
ISSUE 6
PMC-Sierra, Inc.
PM5313 SPECTRA-622
SONET/SDH PAYLOAD EXTRACTOR/ALIGNER FOR 622 MBIT/S
1 FEATURES
1.1 General
• Monolithic SONET/SDH PAYLOAD EXTRACTOR/ALIGNER for use in
STS-12 (STM-4/AU3 or STM-4/AU4) or STS-12c (STM-4-4c) interface
applications, operating at serial interface speeds of up to 622.08 Mbit/s.
• Provides integrated clock and data recovery and clock synthesis for direct
connection to optical modules.
• Supports a duplex byte-serial 77.76 Mbyte/s STS-12 (STM-4/AU3 or
STM-4/AU4) or STS-12c (STM-4-4c) line side interface for use in applications
where by-passing clock recovery, clock synthesis, and serializer-deserializer
functionality is desired.
• Supports clock recovery bypass for use in applications where external clock
recovery is desired.
• Complies with Bellcore GR-253-CORE jitter tolerance (1995 issue), jitter
transfer and intrinsic jitter criteria.
• Provides control circuitry to comply with Bellcore GR-253-CORE WAN
clocking requirements related to wander transfer, holdover and long term
stability when using an external VCXO.
• Provides termination for SONET Section and Line, SDH Regenerator Section
and Multiplexer Section transport overhead, and path overhead of twelve
STS-1 (STM-0/AU3) paths, four STS-3/3c (STM-1/AU3/AU4) paths or a single
STS-12c (STM-4-4c) path.
• De-multiplexes an STM-4 receive stream to four STM-1 Telecom DROP bus
streams.
• Multiplexes four STM-1 Telecom ADD bus streams to an STM-4 transmit
stream.
• Maps twelve STS-1 (STM-0/AU3) payloads, four STS-3/3c (STM-1/AU3/AU4)
payloads or a single STS-12c (STM-4-4c) payload to system timing reference,
accommodating plesiochronous timing offsets between the references
through pointer processing.
• Maps twelve DS3 bit streams into an STS-12 (STM-4/AU3) frame.
PROPRIETARY AND CONFIDENTIAL
1