PM7367 Datasheet, PDF (185/323 Pages) PMC-Sierra, Inc – 32 link, 32 Channel Data Link Manager with PCI Interface

DATA SHEET
PMC-1991499
ISSUE 2
PM7367 FREEDM-32P32
FRAME ENGINE AND DATA LINK MANAGER
RPDRRQW[15:0]:
The receive packet descriptor reference (RPDR) ready queue write bits
(RPDRRQW[15:0]) define bits 17 to 2 of the Receive Packet Descriptor
Reference Ready Queue write pointer. This register is initialised by the host.
The physical write address in the RPDRR queue is the sum of
RPDRRQW[15:0] left shifted by 2 bits with the RQB[31:0] bits in the RMAC
Receive Queue Base register.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMER’S INTERNAL USE 171