PM7351 Datasheet, PDF (114/174 Pages) PMC-Sierra, Inc – Octal Serial Link Multiplexer

RELEASED
DATA SHEET
PMC-1980582
ISSUE 5
PM7351 S/UNI-VORTEX
OCTAL SERIAL LINK MULTIPLEXER
Registers 0x090, 0x0B0, 0x0D0, 0x0F0, 0x110, 0x130, 0x150, 0x170:
Transmit High-Speed Serial Configuration
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Function
DSCR
HSCR
Unused
DHCS
CELLCRC
PREPEND
USRHDR[1]
USRHDR[0]
Default
0
1
X
0
0
0
1
0
These registers configure, on a per-link basis, the format of the cells transmitted
on the eight TXDn+/- serial links.
USRHDR[1:0]:
The USRHDR[1:0] bits determine the length of the User Header field of the
transmitted cells. The User Header defaults to six bytes.
USRHDR[1:0]
00
01
10
11
Bytes in User Header
4
5
6
Reserved
PREPEND:
The PREPEND bit determines if the User Prepend field is inserted into the
transmitted cells. If PREPEND is logic 1, a two byte User Prepend is inserted
after the System Prepend field.
CELLCRC:
The CELLCRC bit determines whether the entire high speed serial data
structure is protected by a CRC-8 code word. The PREPEND bit must be
logic 1 for this bit to have effect. If CELLCRC and PREPEND are logic 1, the
second User Prepend byte is overwritten by the CRC-8 syndrome for the
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 104