PL611S-06 Datasheet, PDF (2/8 Pages) PhaseLink Corporation – Low-Power Programmable Quick Turn ClockTM

P (Preliminary) L611s-06
Low-Power Programmable Quick Turn Clock^TM
KEY PROGRAMMING PARAMETERS
CLK
Output Frequency
Output Drive Strength
FOUT = FREF * M / (R * P)
Where M = 11 bit
R = 8 bit
P = 5 bit
CLK0 = FOUT, FREF or FREF / (2*P)
CLK1 = FREF, FREF/2, CLK0 or CLK0/2
Three optional drive strengths to
choose from:
• Low: 4mA
• Std: 8mA (default)
• High: 16mA
Programmable
Input/Output
One output pin can be configured
as:
• OE - input
• CLK1 – output
PACKAGE PIN ASSIGNMENT
Name
Pin Assignment
SOT23
SC70
DFN
Pin #
Pin#
Pin#
OE, CLK1
1
2
2
GND
2
XIN, FIN
3
XOUT
4
VDD
5
CLK0
6
1
3
3
1
4
6
5
5
6
4
Type
Description
This programmable I/O pin can be configured as an
B
Output Enable (OE) input, or CLK1 output. This pin
has an internal 60KΩ pull up resistor (OE Function
Only).
P GND connection
I Crystal or Reference input pin
Crystal Output pin
O
Do Not Connect (DNC ) when FIN is present
P VDD connection
O Programmable Clock Output
47745 Fremont Blvd., Fremont, California 94538 Tel [phone] Fax [phone] www.phaselink.com Rev 12/12/06 Page 2