PL611-30 Datasheet, PDF (2/7 Pages) PhaseLink Corporation – Programmable Quick Turn Clock

P Preliminary L611-30
Programmable Quick Turn Clock^TM
KEY PROGRAMMING PARAMETERS
CLK[ 0:2 ]
Output Frequency
Fout = FIN * M / (R * P)
where M= 6 bit
R= 1
P= 5 bit
1. CLK[0:1]= VCO / 2 * P
2. CLK[2]= FIN or FIN/2
Output Drive
Strength
Crystal
Load
Programmable
Input/Output (pin #7)
Std: 10mA
(default)
High: 24mA
+/- 200ppm One output pin can be
tuning.
configured as
1. CLK2 = FIN or FIN/2
2. FSEL - input
3. OE - input
# of
Register
Banks
2
Charge-Pump
Current
4 levels of pump
current setting
PIN DESCRIPTION
Name
XIN/FIN
GND
CLK[0:1]
VDD
DNC
Pin #
(M)SOP-8
1
2
3,4
5
6
Type
I
P
O
P
-
Description
Crystal or Reference input pin
GND connection
Programmable Clock Output [note:CLK0=~CLK1]
VDD connection
Do No Connect
This programmable I/O pin can be configured as CLK2
(FIN or FIN/2) output, or OE input, or Frequency
Selection (FSEL) input pin. This pin has an internal 60K
pull up resistor.
CLK2, OE, FSEL
7
State
OE
FSEL
B
0
Tristate
CLK[0:1]
Select Bank ’0’
ROM
1 (default)
Normal
mode
Select Bank ‘1’
ROM
XOUT
8
O
Crystal output pin
47745 Fremont Blvd., Fremont, California 94538 Tel [phone] Fax [phone] www.phaselink.com Rev 03/03/05 Page 2