PL611-01 Datasheet, PDF (2/6 Pages) PhaseLink Corporation – Programmable Quick Turn Clock

KEY PROGRAMMING PARAMETERS
PL611-01
Programmable Quick Turn Clock^TM
CLK[ 0:2 ]
Output Frequency
Fout = FIN * M / (R * P)
where M=10 bit
R= 8 bit
P= 5 bit
1. CLK[0:2]= Fout/[1,2,4,8]
2. CLK[0:2]= FIN or FIN/2
Output Drive Strength Crystal Load
Programmable
Input/Output
Charge-Pump
Current
Std: 10mA (default)
High: 24mA
+/- 200ppm
tuning.
One output pin can be
configured as
1. CLK2 - output
2. FSEL - input
3. OE - input
4. PDB - input
4 levels of
pump current
settings
PIN DESCRIPTION
Name
XIN/FIN
GND
CLK[0:1]
VDD
NC
Pin #
MSOP-8
SOIC-8
SOT-23
1
3
2
2
3,4
1
5
6
6
CLK2, OE, PDB, FSEL
7
5
XOUT
8
4
Type
Description
I
Crystal or Reference input pin
P
GND connection
O
Programmable Clock Output
P
VDD connection (2.25~3.63V)
No Connect
This programmable I/O pin can be configured as a
programmable clock output (CLK2), or Output Enable
(OE) input, or Power Down input (PDB), or Frequency
Selection (FSEL) input pin. This pin has an internal
60KΩ pull up resistor.
B
State
OE
PDB
FSEL
0
Tristate
CLK[0:1]
Power
Down
Mode
Select
Freq. ‘1’
1
Normal _{Normal Select}
(default) _mode mode Freq. ‘2’
O
Crystal output pin
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Rev 09/27/05 Page 2