PL2211_07 Datasheet, PDF (3/9 Pages) Power IC Ltd. – Dual Low Noise LDO in 3mm×3mm MLF

PIN DESCRIPTIONS
Name
IN
EN1
Pin No.
1
2
Type
Supply
Logic input 1
EN2
3
Logic input 2
BYP
4
Bypass
GND
6
Ground
OUT2
9
Analog output2
OUT1
10
Analog output1
Function
Supply voltage. 2.5V ~ 5.5V.
Enable/Shutdown. CMOS compatible input. Logic ‘H’ : enable, logic ‘L’ :
shutdown.
Enable/Shutdown. CMOS compatible input. Logic ‘H’ : enable, logic ‘L’ :
shutdown.
Reference voltage bypass pin. Connect 0.01uF ≤ C_BYP ≤ 0.1uF to GND to
reduce output noise. May be left open.
Ground pin
Regulator 2 Output.
Regulator 1 Output.
BLOCK DIAGRAM
July 2007
www.picsemi.com
3
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