UMA1021AM Datasheet, PDF (9/16 Pages) NXP Semiconductors – Low-voltage frequency synthesizer for radio telephones

Philips Semiconductors
Low-voltage frequency synthesizer for
radio telephones
Product specification
UMA1021AM
SERIAL BUS TIMING CHARACTERISTICS
V_DD1 = V_DD2 = V_CC = 3 V; T_amb = 25 °C; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS MIN.
TYP.
MAX.
Serial programming clock; CLK
t_r
rise time
t_f
fall time
T_cy
clock cycle time
Enable programming; E
t_START
t_END
t_W
t_SU;E
delay to rising clock edge
delay from last falling clock edge
minimum inactive pulse width
enable set-up time to next clock edge
Register serial input data; DATA
t_SU;DAT
t_HD;DAT
input data to clock set-up time
input data to clock hold time
note 1
−
10
40
−
10
40
100
−
−
40
−
−
−20
−
−
4 000
−
−
20
−
−
20
−
−
20
−
−
Note
1. The minimum pulse width (t_W) can be smaller than 4000 ns when the both conditions are fulfilled:
a) Main divider input frequency: f_RF > ^4--t--4_W---7--
b) Reference divider input frequency: f_xtal > _t--3W---
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
handbook, full pagewtSid_Uth_;DAT
CLK
DATA
MSB
E
tSTART
tHD;DAT
Tcy
tf
tr
tEND tSU;E
LSB
ADDRESS
MBG368
tW
1998 Nov 19
Fig.3 Serial bus timing diagram.
9