TDA8768 Datasheet, PDF (9/20 Pages) NXP Semiconductors – 12-bit high-speed Analog-to-Digital Converter ADC

Philips Semiconductors
12-bit high-speed Analog-to-Digital
Converter (ADC)
Preliminary specification
TDA8768
SYMBOL
PARAMETER
CONDITIONS
MIN.
THERMAL NOISE
N_th(rms)
thermal noise (RMS value) grounded input;
−
f_CLK = 40 MHz
SPURIOUS FREE DYNAMIC RANGE
DR_sf
spurious free dynamic range f_i = 4.43 MHz
tbf
f_i = 10 MHz
tbf
f_i = 20 MHz
tbf
SIGNAL-TO-NOISE RATIO; note 5
S/N
signal-to-noise ratio
without harmonics;
−
f_CLK = 40 MHz; f_i = 4.43 MHz
EFFECTIVE NUMBER OF BITS; note 5
N_bit
effective number of bits
f_i = 4.43 MHz
−
TDA8768H/4 (f_CLK = 40 MHz) _{fi = 10 MHz}
−
f_i = 15 MHz
−
effective number of bits
f_i = 4.43 MHz
−
TDA8768H/5 (f_CLK = 55 MHz) _{fi = 10 MHz}
−
f_i = 15 MHz
−
f_i = 20 MHz
−
INTERMODULATION; note 6
TTIR
two-tone intermodulation
f_CLK = 40 MHz
tbf
rejection
d₃
third order intermodulation f_CLK = 40 MHz
tbf
distortion
BIT ERROR RATE
BER
bit error rate
f_CLK = 40 MHz;
−
f_i = 4.43 MHz;
V_I = ±16 LSB at code 2047
Timing (C_L = 10 pF); see Fig.3 and note 7
t_d(s)
sampling delay time
−
t_h
output hold time
4
t_d
output delay time
V_CCO = 5.25 V
−
V_CCO = 3.0 V
3-state output delay times; see Fig.4
t_dZH
enable HIGH
−
t_dZL
enable LOW
−
t_dHZ
disable HIGH
−
t_dLZ
disable LOW
−
TYP. MAX. UNIT
0.25 tbf
LSB
69 −
dB
tbf −
dB
tbf −
dB
67 −
dB
10.3 −
bits
tbf −
bits
tbf −
bits
9.9 −
bits
tbf −
bits
tbf −
bits
tbf −
bits
66 −
dB
67 −
dB
10^−15 tbf
times/
sample
−
2
ns
−
−
ns
10 15
ns
13 18
ns
14 18
ns
16 20
ns
16 20
ns
14 18
ns
1998 Aug 26
9