TDA8768 Datasheet, PDF (14/20 Pages) NXP Semiconductors – 12-bit high-speed Analog-to-Digital Converter ADC

Philips Semiconductors
12-bit high-speed Analog-to-Digital
Converter (ADC)
Preliminary specification
TDA8768
handbook, full pagewidth
R2
220 Ω
100 nF
270 Ω
TTL (1)
input
D
TRANSLATOR
270 Ω
R1
500 Ω
Z0 = 50 Ω
CLK ₃₅
PECL
Z0 = 50 Ω
CLK ₃₆
R1
500 Ω
100 nF
TDA8768
R2
220 Ω
If the clock lines are more than 1 inch long they must be matched. In fact, the 27 Ω resistor will be changed
by the series connection of R1 and R2, with R1 = Z_o placed close to pins CLK and CLK.
(1) 50 Ω matched line (Z_o, L).
MGL474
Fig.6 Application diagram for differential clock input (PECL-compatible) using a TTL to PECL translator.
handbook, full pagewidth
VCCD
R1
82 Ω
TTL (1)
input
D
TRANSLATOR
PECL
R2
120 Ω
100 nF
R1
82 Ω
CLK ₃₅
CLK
36
R2
120 Ω
TDA8768
The value of R1 and R2 must be chosen in order to meet the following relations:
3 V = ^V----R-C---^C_1----^D-₊----^×-R---R--2---2-- and Z0 = _{R-R----11-----+}^×-----RR-----22--
(1) 50 Ω matched line (Z_o, L).
MGL473
Fig.7 Application diagram for differential clock input (PECL-compatible) using a TTL to PECL translator
and Thevenin parallel terminations.
1998 Aug 26
14