TDA8443A Datasheet, PDF (9/20 Pages) NXP Semiconductors – I2C-bus controlled YUV/RGB switch

Philips Semiconductors
I²C-bus controlled YUV/RGB switch
Product specification
TDA8443A
SYMBOL
PARAMETER
CONDITIONS
G_diff(p-p)
differential gain at nominal output
signals (peak-to-peak value)
R−Y = 1.05 V (p-p)
B−Y = 1.33 V (p-p)
Y = 0.34 V (p-p)
S/N
signal-to-noise ratio
nominal input; B = 5 MHz;
note 2
SVRR
supply voltage ripple rejection
note 3
V_O
DC output levels during clamping
Synchronization channels
G_diff
B
V_i(p-p)
gain difference (programmed value)
bandwidth
input amplitude of sync signal for
correct operation of clamp pulse
generator (peak-to-peak value)
−3 dB
+3 dB; gain × 1
±3 dB; gain × 2
|Z_23-22|
V_o(p-p)
output impedance (pin 23)
maximum undistorted output
amplitude (pin 23)
(peak-to-peak value)
V_O
DC output level on top of sync pulse
I²C-bus inputs for SDA, SCL
V_IH
HIGH level input voltage
V_IL
LOW level input voltage
I_IH
HIGH level input current
I_IL
LOW level input current
I²C-bus output for SDA (open collector)
V_OL
LOW level output voltage
I_OL = 3 mA
Address selection inputs for S0, S1, S2
V_IH
HIGH level input voltage
V_IL
LOW level input voltage
I_IH
HIGH level input current
I_IL
LOW level input current
Fast switching input
V_IH
HIGH level input voltage
V_IL
LOW level input voltage
I_IH
HIGH level input current
I_IL
LOW level input current
t_sw
switching time
t_d
switching delay
see Fig.5
see Fig.5
MIN.
−
−
−
50
TYP.
−
−
−
−
MAX.
10
10
10
−
UNIT
%
%
%
dB
30
−
−
dB
−
5.3
−
V
−
−
10
%
−
50
−
MHz
−
20
−
MHz
−
13
−
MHz
0.2
−
2.5
V
−
20
30
Ω
2.5
−
−
V
1.5
1.9
2.4
V
3
−
−0.3
−
−
−
−
−
V_P
V
1.5
V
10
µA
10
µA
−
−
0.4
V
3
−
V_P
V
−0.3
−
0.4
V
−
0
10
µA
−50
−10 0
µA
1
−
−0.3
−
−
0
−100 −
−
10
−
20
3
V
0.4
V
500 µA
−
µA
−
ns
−
ns
1995 Mar 07
9