TDA8443A Datasheet, PDF (15/20 Pages) NXP Semiconductors – I2C-bus controlled YUV/RGB switch

Philips Semiconductors
I²C-bus controlled YUV/RGB switch
Product specification
TDA8443A
Input clamps
The R, G, B respectively (R−Y), Y and (B−Y) video signals
are AC-coupled to the IC where they are clamped on the
black level. The timing information for this clamping action
is derived from the associated synchronization signal
SYNC, which could also consist of the composite video
information signal CVBS. The syncsignal is AC-coupled to
the IC where it is clamped on top-sync level, information
obtained from this action is used to generate the clamp
pulses.
The clamp pulses can be generated in two ways:
1. Using the sync information (internal clamping)
The sync information is clamped on top-sync and the
information obtained from this action is used to switch
an internal current source at pin 24.
Pin 24 should be connected to V_P via a 4.7 kΩ resistor,
and a 1 nF capacitor to ground. During video scan the
voltage at pin 24 will be HIGH (equals positive supply
voltage). During the synchronization pulses the
voltage at pin 24 will drop to zero because of the
current sink (2.5 mA).
When the synchronization pulse is over, the current
source is switched off and the voltage at pin 24 will rise
to its higher level. Because of the time constant at
pin 24, the restoration will take some microseconds.
The voltage at pin 24 is also sensed internally and at
the time it is between 0.456V_P and 0.544V_P, a time
pulse is generated and used for the clamping action.
2. Using a sandcastle pulse (external clamping)
If an associated sandcastle pulse is available, it can
also be used as a clamping pulse. In this event the
sandcastle pulse should be connected to pin 24, the
top of the clamping pulse should be between 0.544V_P
and 0.456V_P. The timing of the internal clamping pulse
will be equal to the timing of the higher part of the
sandcastle pulse. If the sync signal is also connected,
the current sink will also become active during the
synchronization pulses. This means that the
sandcastle pulse should be connected to pin 24 via a
1 kΩ dropping resistor. In this event only the
sandcastle pulse at pin 24 will be influenced during
sync pulses, but the sandcastle pulse at the
sandcastle source will be unchanged.
handbook, halfpage V P
9.4 kΩ
1.8 kΩ
9.4 kΩ
pin 24
MEA623
V1 = 0.544 VP
V2 = 0.456 VP
V1
clamp pulse
V2
signal
ON when current sync = 2.5 mA
OFF when current sync = 0 mA
Tolerance on V1 and V2 is given by ∆R/R and ∆V_P/V_P. The diffusion process gives ∆R/R (max) = 1.5%.
Fig.7 Clamping circuit.
1995 Mar 07
15