TDA8421 Datasheet, PDF (9/26 Pages) NXP Semiconductors – Hi-fi stereo audio processor; I2C bus

Philips Semiconductors
Hi-fi stereo audio processor; I²C bus
Product specification
TDA8421
Sequence of data transmission
After a power-on reset all eight functions have to be adjusted with eight data transmissions. It is recommended that data
information for switch functions in CH1 are transmitted last because all functions have to be adjusted when the muting
is switched off. The sequence of transmission of other data information is not critical.
The order of data transmission is shown in Figures 4 and 5. The number of data transmissions is unrestricted but before
each data byte the module address MAD and the correct subaddress SAD is required.
Fig.4 Data transmission after a power-on reset.
Fig.5 Data transmission except after power-on reset.
May 1988
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