SC16C650B Datasheet, PDF (9/51 Pages) NXP Semiconductors – 5 V, 3.3 V and 2.5 V UART with 32-byte FIFOs and infrared (IrDA) encoder/decoder

Philips Semiconductors
SC16C650B
UART with 32-byte FIFOs and IrDA encoder/decoder
Table 2:
Symbol
RX
TX
TXRDY
V_CC
GND
IOW
IOW
XTAL1
XTAL2^[1]
n.c.
Pin description…continued
Pin
Type Description
PLCC44 LQFP48 HVQFN32 DIP40
11
7
5
10 I
Serial data input. RX is serial data input from a connected
communications device.
13
8
6
11 O
Serial data output. TX is composite serial data output to a
connected communication device. TX is set to the marking
(HIGH) level as a result of Master Reset.
27
23
15
24 O
Transmitter ready. Transmitter DMA signaling is available
with TXRDY. When operating in the FIFO mode, one of two
types of DMA signaling can be selected using FCR[3]. When
operating in the 16C450 mode, only DMA mode 0 is allowed.
Mode 0 supports single-transfer DMA in which a transfer is
made between CPU bus cycles. Mode 1 supports
multi-transfer DMA in which multiple transfers are made
continuously until the transmit FIFO has been filled.
44
42
27
40 Power 2.5 V, 3 V or 5 V supply voltage.
22
18
13
20 Power Ground voltage.
21
17
-
20
16
11
19 I
18 I
Write inputs. When either IOW or IOW is active (LOW or
HIGH, respectively) and while the UART is selected, the
CPU is allowed to write control words or data into a selected
UART register. Only one of these inputs is required to
transfer data during a write operation; the other input should
be tied to its inactive level (i.e., IOW tied LOW or IOW tied
HIGH).
18
14
9
16 I
Crystal connection or External clock input.
19
15
10
17 O
Crystal connection or the inversion of XTAL1 if XTAL1 is
driven.
1, 12,
23, 34
1, 6, 13, 12
21, 25,
36, 37,
48
-
-
not connected
[1] In sleep mode, XTAL2 is left floating.
9397 750 14451
Product data
Rev. 03 — 10 December 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
9 of 51