74LVC_LVCH16244A_15 Datasheet, PDF(9/19 Page) NXP Semiconductors – 16-bit buffer/line driver; 5 V input/output tolerant; 3-state

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74LVC_LVCH16244A_15 Datasheet, PDF (9/19 Pages) NXP Semiconductors – 16-bit buffer/line driver; 5 V input/output tolerant; 3-state

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NXP Semiconductors

74LVC16244A; 74LVCH16244A

16-bit buffer/line driver; 5 V input/output tolerant; 3-state

Table 7. Dynamic characteristics â¦continued

Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 9.

Symbol Parameter Conditions

ï40 ï°C to +85 ï°C

Min Typ[2] Max

CPD

power

per input; VI = GND to VCC

dissipation

capacitance

VCC = 1.65 V to 1.95 V

VCC = 2.3 V to 2.7 V

[3]

4.8

8.3

VCC = 3.0 V to 3.6 V

11.4

ï40 ï°C to +125 ï°C Unit

Min

Max

- pF

[1] tpd is the same as tPLH and tPHL.

ten is the same as tPZL and tPZH.

tdis is the same as tPLZ and tPHZ.

[2] Typical values are measured at Tamb = 25 ï°C and VCC = 1.2 V, 1.8 V, 2.5 V, 2.7 V and 3.3 V respectively.

[3] CPD is used to determine the dynamic power dissipation (PD in ïW).

PD = CPD ï´ VCC2 ï´ fi ï´ N + ï(CL ï´ VCC2 ï´ fo) where:

fi = input frequency in MHz; fo = output frequency in MHz

CL = output load capacitance in pF

VCC = supply voltage in Volts

N = number of inputs switching

ï(CL ï´ VCC2 ï´ fo) = sum of the outputs.

11. Waveforms

nAn input

GND

VOH

tPLH

nYn output

VOL

tPHL

mna171

Fig 7.

Measurement points are given in Table 8.

Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.

The input (nAn) to output (nYn) propagation delays

74LVC_LVCH16244A

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 13 â 7 February 2014

9 of 19

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