74HC7597 Datasheet, PDF (9/12 Pages) NXP Semiconductors – 8-bit shift register with input latches

Philips Semiconductors
8-bit shift register with input latches
Product specification
74HC/HCT7597
DC CHARACTERISTICS FOR 74HCT
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
I_CC category: MSI
Note to HCT types
The value of additional quiescent supply current (∆I_CC) for a unit load of 1 is given in the family specifications.
To determine ∆I_CC per input, multiply this value by the unit load coefficient shown in the table below.
INPUT
UNIT LOAD COEFFICIENT
D_S
D_n
PL, MR
LE, SH_CP
0.25
0.40
1.50
1.50
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; t_r = t_f = 6 ns; C_L = 50 pF
T_amb (°C)
TEST CONDITIONS
SYMBOL PARAMETER
74HCT
+25
−40 to +85
UNIT
−40 to +125
V_CC
(V)
WAVEFORMS
min. typ. max. min. max. min. max.
t_PHL/ t_PLH
t_PHL
t_PHL/ t_PLH
t_PHL/ t_PLH
t_PHL/ t_PLH
t_THL/ t_TLH
propagation delay
SH_CP to Q
propagation delay
MR to Q
propagation delay
LE to Q
propagation delay
PL to Q
propagation delay
D₇ to Q
output transition time
20 35
44
53 ns 4.5 Fig.7
25 42
53
63 ns 4.5 Fig.7
31 53
66
80 ns 4.5 Fig.7
27 46
58
69 ns 4.5 Fig.7
28 49
61
74 ns 4.5 Fig.7
7 15
19
22 ns 4.5 Fig.7
t_W
SH_CP pulse width
16 6
20
24
ns 4.5 Fig.7
HIGH or LOW
t_W
LE pulse width
LOW
16 7
20
24
ns 4.5 Fig.7
t_W
MR pulse width
LOW
20 11
25
30
ns 4.5 Fig.7
t_W
PL pulse width
LOW
18 9
23
27
ns 4.5 Fig.7
t_rem
removal time
MR to SH_CP
10 −1
13
15
ns 4.5 Fig.7
t_rem
removal time
MR to PL
20 9
25
30
ns 4.5 Fig.7
December 1990
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