74HC7597 Datasheet, PDF (12/12 Pages) NXP Semiconductors – 8-bit shift register with input latches

Philips Semiconductors
8-bit shift register with input latches
Product specification
74HC/HCT7597
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT: V_M = 1.3 V; V_I = GND to 3 V.
Fig.11 Waveforms showing the D₇ input to Q
output propagation delays and output
transition times.
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT: V_M = 1.3 V; V_I = GND to 3 V.
Fig.12 Waveforms showing the MR input to PL,
SH_CP removal times.
The shaded areas indicate when the input is permitted to
change for predictable output performance.
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT: V_M = 1.3 V; V_I = GND to 3 V.
Fig.13 Waveforms showing hold and set-up times
for D_S, D_n inputs to SH_CP, LE inputs.
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT: V_M = 1.3 V; V_I = GND to 3 V.
Fig.14 Waveforms showing set-up and hold times
for PL input to SH_CP input.
PACKAGE OUTLINES
See “74HC/HCT/HCU/HCMOS Logic Package Outlines”.
December 1990
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