74HC166 Datasheet, PDF (9/10 Pages) NXP Semiconductors – 8-bit parallel-in/serial-out shift register

Philips Semiconductors
8-bit parallel-in/serial-out shift register
AC WAVEFORMS
Product specification
74HC/HCT166
The changing to output assumes internal Q₆ opposite state from Q₇.
The number of clock pulses required between the t_PLH and t_PHL
measurements can be determined from the function table.
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT: V_M = 1.3V; V_I = GND to 3V.
Fig.7 Waveforms showing the clock (CP) to output (Q₇) propagation delays, the clock pulse width, the output
transition times and the maximum clock frequency.
The number of clock pulses required between the t_PLH and t_PHL
measurements can be determined from the function table.
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT: V_M = 1.3V; V_I = GND to 3V.
Fig.8 Waveforms showing the master reset (MR) pulse width, the master reset to output (Q₇) propagation delay
and the master reset to clock (CP) removal time.
December 1990
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