TDA8761 Datasheet, PDF (8/20 Pages) NXP Semiconductors – 9-bit analog-to-digital converter for digital video

Philips Semiconductors
9-bit analog-to-digital converter for
digital video
Preliminary specification
TDA8761
SYMBOL
PARAMETER
CONDITIONS
BANDWIDTH (f_clk = 30 MHz)
B
analog bandwidth
t_STLH
t_STHL
analog input settling time
LOW-to-HIGH
analog input settling time
HIGH-to-LOW
full-scale sine wave;
note 6
75% full-scale sine
wave; note 6
small signal at
mid-scale;
V_I = ±10 LSB at
code 256; note 6
full-scale square wave;
Fig.5; note 7
full-scale square wave;
Fig.5; note 7
HARMONICS (f_clk = 30 MHZ)
THD
total harmonic distortion
SIGNAL-TO-NOISE RATIO; see Fig.7; note 8
S/N
signal-to-noise ratio (full scale)
EFFECTIVE BITS; see Fig 6; note 8
EB
effective bits
TWO-TONE; note 9
TTIR
two-tone intermodulation rejection
BIT ERROR RATE
BER
bit error rate
f_i = 10 MHz
without harmonics;
f_clk = 30 MHz;
f_i = 10 MHz
f_clk = 30 MHz;
f_i = 10 MHz
f_clk = 30 MHz
f_clk = 30 MHz;
f_i = 10 MHz;
V_I = ±16 LSB at
code 256
DIFFERENTIAL GAIN; note 10
G_diff
differential gain
f_clk = 30 MHz;
PAL modulated ramp
DIFFERENTIAL PHASE; note 10
ϕ_diff
differential phase
f_clk = 30 MHz;
PAL modulated ramp
Timing (f_clk = 30 MHz; C_L = 15 pF); see Fig.3; note 11
t_ds
sampling delay time
t_h
output hold time
t_d
output delay time
C_L
digital output load
MIN.
−
−
−
−
−
−
53
−
−
−
−
−
−
5
−
−
TYP.
40
55
700
2.0
2.5
−64
55
8.5
−64
10^−13
tbf
tbf
−
−
10
15
MAX.
−
−
−
tbf
tbf
−
−
−
−
−
−
−
2
−
14
40
UNIT
MHz
MHz
MHz
ns
ns
dB
dB
bits
dB
times/
sample
%
deg
ns
ns
ns
pF
1995 Mar 20
8