TDA8761 Datasheet, PDF (7/20 Pages) NXP Semiconductors – 9-bit analog-to-digital converter for digital video

Philips Semiconductors
9-bit analog-to-digital converter for
digital video
Preliminary specification
TDA8761
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP.
MAX.
UNIT
Reference voltages for the resistor ladder; see Table 1
V_RB
V_RT
V_diff
I_ref
R_LAD
TC_RLAD
reference voltage BOTTOM
reference voltage TOP
differential reference voltage
V_RT − V_RB
reference current
resistor ladder
temperature coefficient of the resistor
ladder
V_osB
V_osT
V_i(p-p)
offset voltage BOTTOM
offset voltage TOP
analog input voltage
(peak-to-peak value)
note 2
note 2
note 3
1.2 1.3 −
V
−
3.3
V_CCA − 0.8 V V
1.8 2.0 3.0
V
−
30
−
−
85
−
−
1.86 −
−
158 −
−
250 −
−
250 −
1.3 1.5 2.5
mA
Ω
ppm
mΩ/K
mV
mV
V
Outputs
DIGITAL OUTPUTS D8 TO D0 AND IR (REFERENCED TO OGND)
V_OL
LOW level output voltage
V_OH
HIGH level output voltage
I_OZ
output current in 3-state mode
I_O = 1 mA
I_O = 0 mA
I_O = −0.4 mA
I_O = −1 mA
0.4 V < V_O < V_CCO
Switching characteristics
0
−
2.7 −
2.7 −
2.4 −
−20 −
0.4
V
V_CCO − 0.5 V
V_CCO − 1.3 V
V_CCO − 1.4 V
+20
µA
CLOCK INPUT CLK; see Fig.3; note 1
f_clk(max)
t_CPH
t_CPL
maximum clock frequency
clock pulse width HIGH
clock pulse width LOW
Analog signal processing
30
−
−
10
−
−
10
−
−
MHz
ns
ns
LINEARITY
AINL
AC integral non-linearity
note 5; full scale input −
±0.75 tbf
LSB
sine wave
note 5; 50% full scale −
±0.5 tbf
LSB
input sine wave
ADNL AC differential non-linearity
note 5; full scale input −
±0.5 tbf
LSB
sine wave
note 5; 50% full scale −
±0.3 tbf
LSB
input sine wave
OFER offset error
middle code;
−
±1
−
LSB
V_RB = 1.3 V; V_RT = 3.3 V
GER
gain error (from device to device)
V_RB = 1.3 V;
−
±0.1 −
%
V_RT = 3.3 V; note 4
1995 Mar 20
7