PMV117EN Datasheet, PDF (8/12 Pages) NXP Semiconductors – uTrenchMOS enhanced logic level FET

Philips Semiconductors
PMV117EN
µTrenchMOS™ enhanced logic level FET
3
V_GS = 0 V
I_S
(A)
2
03ak60
1
T_j = 150 ˚C
25 ˚C
10³
C
(pF)
10²
03ak61
C_iss
C_oss
C_rss
0
0
0.3
0.6
0.9
1.2
V_SD (V)
10
10^−1
1
10 _{VDS (V)} 10²
T_j = 25 °C and 150 °C; V_GS = 0 V
Fig 12. Source (diode forward) current as a function of
source-drain (diode forward) voltage; typical
values
V_GS = 0 V; f = 1 MHz
Fig 13. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values
9397 750 14709
Product data sheet
Rev. 02 — 7 April 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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