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PMV117EN Datasheet, PDF (1/12 Pages) NXP Semiconductors – uTrenchMOS enhanced logic level FET | |||
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PMV117EN
µTrenchMOS⢠enhanced logic level FET
Rev. 02 â 7 April 2005
Product data sheet
1. Product proï¬le
1.1 General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS⢠technology.
1.2 Features
s Logic level threshold
s Subminiature surface-mounted
package
s Very fast switching
1.3 Applications
s Battery management
s High-speed switch
s Low power DC-to-DC converter
1.4 Quick reference data
s VDS ⤠30 V
s RDSon ⤠117 m⦠(VGS = 10 V)
s ID ⤠2.5 A
s Ptot ⤠0.83 W
2. Pinning information
Table 1: Pinning
Pin
Description
1
gate (G)
2
source (S)
3
drain (D)
Simpliï¬ed outline
3
1
2
SOT23
Symbol
D
G
mbb076 S
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