P89V51RD2 Datasheet, PDF (8/75 Pages) NXP Semiconductors – 8-bit 80C51 5 V low power 64 kB Flash microcontroller with 1 kB RAM

Philips Semiconductors
P89V51RD2
8-bit microcontrollers with 80C51 core
Table 3:
Symbol
P2.0 to
P2.7
P89V51RD2 pin description…continued
Pin
Type
DIP40
TQFP44 PLCC44
21-28
18-25
24-31
I/O
with internal
pull-up
P3.0 to
P3.7
10-17
5, 7-13
11, 13-19
I/O
with internal
pull-up
P3.0
10
5
11
I
P3.1
11
7
13
O
P3.2
12
8
14
I
P3.3
13
9
15
I
P3.4
14
10
16
I
P3.5
15
11
17
I
P3.6
16
12
18
O
P3.7
17
13
19
O
PSEN
29
26
32
I/O
RST
9
4
10
I
Description
Port 2: Port 2 is an 8-bit bi-directional I/O port with
internal pull-ups. Port 2 pins are pulled HIGH by the
internal pull-ups when ‘1’s are written to them and can
be used as inputs in this state. As inputs, Port 2 pins that
are externally pulled LOW will source current (I_IL)
because of the internal pull-ups. Port 2 sends the
high-order address byte during fetches from external
program memory and during accesses to external Data
Memory that use 16-bit address (MOVX@DPTR). In this
application, it uses strong internal pull-ups when
transitioning to ‘1’s. Port 2 also receives some control
signals and a partial of high-order address bits during
the external host mode programming and verification.
Port 3: Port 3 is an 8-bit bidirectional I/O port with
internal pull-ups. Port 3 pins are pulled HIGH by the
internal pull-ups when ‘1’s are written to them and can
be used as inputs in this state. As inputs, Port 3 pins that
are externally pulled LOW will source current (I_IL)
because of the internal pull-ups. Port 3 also receives
some control signals and a partial of high-order address
bits during the external host mode programming and
verification.
RXD: serial input port
TXD: serial output port
INT0: external interrupt 0 input
INT1: external interrupt 1 input
T0: external count input to Timer/Counter 0
T1: external count input to Timer/Counter 1
WR: external data memory write strobe
RD: external data memory read strobe
Program Store Enable: PSEN is the read strobe for
external program memory. When the device is executing
from internal program memory, PSEN is inactive
(HIGH). When the device is executing code from
external program memory, PSEN is activated twice each
machine cycle, except that two PSEN activations are
skipped during each access to external data memory. A
forced HIGH-to-LOW input transition on the PSEN pin
while the RST input is continually held HIGH for more
than 10 machine cycles will cause the device to enter
external host mode programming.
Reset: While the oscillator is running, a HIGH logic state
on this pin for two machine cycles will reset the device. If
the PSEN pin is driven by a HIGH-to-LOW input
transition while the RST input pin is held HIGH, the
device will enter the external host mode, otherwise the
device will enter the normal operation mode.
9397 750 12964
Product data
Rev. 01 — 01 March 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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